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MC100EP90 bảng dữ liệu(PDF) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2004
June, 2004 − Rev. 4
1
Publication Order Number:
MC10EP90/D
MC10EP90, MC100EP90
−3.3V / −5VTriple ECL Input
to LVPECL/PECL Output
Translator
The MC10/100EP90 is a TRIPLE ECL TO LVPECL/PECL
translator. The device receives differential LVECL or ECL signals and
translates them to differential LVPECL or PECL output signals.
A VBB output is provided for interfacing with Single−Ended LVECL
or ECL signals at the input. If a Single−Ended input is to be used the
VBB output should be connected to the D input. The active signal would
then drive the D input. When used the VBB output should be bypassed
to ground by a 0.01
mF capacitor. The VBB output is designed to act as
the switching reference for the EP90 under Single−Ended input
switching conditions, as a result this pin can only source/sink up to 0.5
mA of current.
To accomplish the level translation the EP90 requires three power
rails. The VCC supply should be connected to the positive supply, and
the VEE connected to the negative supply.
The 100 Series contains temperature compensation.
260 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
Voltage Supplies V
CC = 3.0 V to 5.5 V, VEE = −3.0 V to −5.5 V,
GND = 0 V
Open Input Default State
Safety Clamp on Inputs
Fully Differential Design
Q Output Will Default LOW with Inputs Open or at V
EE
V
BB Output
These are Pb−Free Devices*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
TSSOP−20
DT SUFFIX
CASE 948E
MARKING DIAGRAM*
xxx
= MC10 or 100
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
*For additional marking information, refer to
Application Note AND8002/D.
XXXX
EP90
ALYW
1
20
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION


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