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LM4855LQ bảng dữ liệu(PDF) 6 Page - National Semiconductor (TI) |
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LM4855LQ bảng dữ liệu(HTML) 6 Page - National Semiconductor (TI) |
6 / 24 page Electrical Characteristics (Notes 2, 8) (Continued) The following specifications apply for V DD= 3.0V, TA= 25˚C unless otherwise specified. Symbol Parameter Conditions LM4855 Units (Limits) Typical (Note 5) Limits (Note 6) Digital Volume Range (R IN and L IN) Input referred minimum gain -34.5 -35.1 -33.9 dB (min) dB (max) Input referred maximum gain 12.0 11.4 12.6 dB (min) dB (max) Digital Volume Stepsize 1.5 dB Digital Volume Stepsize Error ±0.1 ±0.6 dB ( max) Phone_In_IHF Volume BTL gain from Phone_In _IHF to SPKR OUT 12 11.4 12.6 dB (min) dB (max) Phone _In_IHF Mute Attenuation Output Mode 2, 4, 6 80 72 dB (min) Phone_In_IHF Input Impedance 20 15 25 k Ω (min) k Ω (max) Phone_In_HS Input Impedance Maximum gain setting 50 37.5 62.5 k Ω (min) k Ω (max) Mininum gain setting 100 75 125 k Ω (min) k Ω (max) R IN and LIN Input Impedance Maximum gain setting 33.5 25 42 k Ω (min) k Ω (max) Mininum gain setting 100 75 125 k Ω (min) k Ω (max) t SD Thermal Shutdown Temperature 170 150 ˚C (min) t ES Enable Setup Time (ENB) 20 ns (min) t EH Enable Hold Time (ENB) 20 ns (min) t EL Enable Low Time (ENB) 30 ns (min) t DS Data Setup Time (DATA) 20 ns (min) t DH Data Hold Time (DATA) 20 ns (min) t CS Clock Setup Time (CLK) 20 ns (min) t CH Clock Logic High Time (CLK) 50 ns (min) t CL Clock Logic Low Time (CLK) 50 ns (min) f CLK Clock Frequency DC 10 (min) MHz (max) Note 2: Absolute Maximum Rating indicate limits beyond which damage to the device may occur. Note 3: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 4: Human body model, 100pF discharged through a 1.5k Ω resistor. Note 5: Typical specifications are specified at +25˚C and represent the most likely parametric norm. Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 7: Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50 Ω). Note 8: All voltages are measured with respect to the ground pin, unless otherwise specified. Note 9: The given θJA and θJC are for an LM4855 mounted on a demonstration board with a 4in2 area of 1oz printed circuit board copper ground plane. Note 10: Please refer to the Output Noise vs Output Mode table in the Typical Performance Characteristics section for more details. www.national.com 6 |
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