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UC1714J bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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2 / 16 page UC1714, UC1715, UC2714 UC2715, UC3714, UC3715 SLUS170B – FEBRUARY 1999 – REVISED MAY 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) (2) MIN MAX UNIT Auxiliary Driver IOH continuous –100 mA peak –500 mA Auxiliary Driver IOL continuous 200 mA peak 1 A Input Voltage Range (INPUT, ENBL) –0.3 20 V Power Driver IOH continuous –200 mA peak –1 A Power Driver IOL continuous 400 mA peak 2 A VCC Supply voltage 20 V Lead Temperature (Soldering 10 seconds) 300 °C Operating Junction Temperature(3) 150 °C Storage Temperature Range –65 150 °C (1) Consult the Packaging Section at the end of this datasheet for thermal limitations and specifications of packages. (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (3) Unless otherwise indicated, voltages are referenced to ground and currents are positive into, negative out of, the specified terminals. ELECTRICAL CHARACTERISTICS Unless otherwise stated, VCC = 15 V, ENBL ≥ 2 V, RT1 = 100 kΩ from T1 to GND, RT2 = 100 kΩ from T2 to GND, and −55°C < TA < 125°C for the UC1714 and UC1715, –40°C < TA < 85°C for the UC2714 and UC2715, and 0°C < TA < 70°C for the UC3714 and UC3715, TA = TJ PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Overall VCC 7 20 V ICC Nominal ENBL = 2 V 18 24 mA Sleep mode ENBL = 0.8 V 200 300 µA Power Driver (PWR) Pre turn-on PWR output, low VCC = 0 V, IOUT = 10 mA, ENBL at 0.3 1.6 V 0.8 V VPWR PWR output low, sat. INPUT = 0.8 V, IOUT = 40 mA 0.3 0.8 V INPUT = 0.8 V, IOUT = 400 mA 2.1 2.8 VCC − PWR output high, sat. INPUT = 2 V, IOUT = −20 mA 2.1 3 V VPWR INPUT = 2 V, IOUT = −200 mA 2.3 3 Rise time CL = 2200 pF 30 60 ns Fall time CL = 2200 pF 25 60 ns T1 Delay, AUX to PWR INPUT rising edge, RT1 = 10 kΩ (1) 20 35 80 ns INPUT rising edge, RT1 = 100 kΩ (1) 350 500 700 PWR Prop Delay INPUT falling edge, 50%(2) 35 100 ns Auxiliary Driver (AUX) VAUX AUX output low, sat. VIN = 2 V, IOUT = 20 mA 0.3 0.8 V VIN = 2 V, IOUT = 200 mA 1.8 2.6 VCC – AUX output high, sat. VIN = 0.8 V, IOUT = –10 mA 2.1 3 V VAUX VIN = 0.8 V, IOUT = –100 mA 2.3 3 Rise Time CL = 1000 pF 45 60 ns (1) T1 delay is defined from the 50% point of the transition edge of AUX to the 10% of the rising edge of PWR. T2 delay is defined from the 90% of the falling edge of PWR to the 50% point of the transition edge of AUX. (2) Propagation delay times are measured from the 50% point of the input signal to the 10% point of the output signal’s transition with no load on outputs. 2 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: UC1714 UC1715 UC2714 UC2715 UC3714 UC3715 |
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