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UC1856-SP bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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UC1856-SP bảng dữ liệu(HTML) 6 Page - Texas Instruments |
6 / 24 page UC1856-SP SLUSBV6 – APRIL 2014 www.ti.com Electrical Characteristics (continued) Unless otherwise stated, these specifications apply for TA –55°C to +125°C, VIN = 15 V, RT = 10 kΩ, CT = 1 nF, TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CURRENT LIMIT ADJUST SECTION Current limit offset VCS– = 0 V , VCS+ = 0V, COMP = Open (4) 0.43 0.5 0.57 V Input bias current –10 –30 µA SHUTDOWN PIN SECTION Threshold voltage 0.95 1 1.05 V Input voltage range 0 5 V Minimum latching current (ICL SS) See (5) 3 1.5 mA Maximum non-latching current (ICL SS) See (6) 1.5 0.8 mA Delay to outputs VSHUTDOWN = 0 V to 1 .3 V 65 110 ns OUTPUT SECTION Collector-emitter voltage 40 V Off-state bias current VC = 40 V 250 µA lOUT = 20 mA 0.1 0.5 Output low level V lOUT = 200 mA 0.5 2.6 lOUT = –20 mA 12.5 13.2 Output high level V lOUT = –200 mA 12 13.1 Rise time C1 = 1 nF 40 80 ns Fall time C1 = 1 nF 40 80 ns UVLO low saturation VIN = 0 V, lOUT = 20 mA 0.8 1.5 V PWM SECTION Maximum duty cycle 45% 47% 50% Minimum duty cycle 0% UNDERVOLTAGE LOCKOUT SECTION Startup threshold 7.7 8 V Threshold hysterisis 0.7 V TOTAL STANDBY CURRENT Supply current 18 23 mA (4) Parameter measured at trip point of latch with VEA+ = VREF, VEA– = 0 V. (5) Current into CL SS ensued to latch circuit into shutdown state. (6) Current into CL SS ensured not to latch circuit into shutdown state. 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: UC1856-SP |
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Mô tả tương tự - UC1856-SP |
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