SYNC

LM5576

UP TO 5 TOTAL

DEVICES

LM5576

SYNC

SYNC

AGND

LM5576

SW

CLK

SYNC

SW

500 ns

- 580 x 10

-9

135 x 10

-12

F

1

LM5576Q0

www.ti.com

SNOSB24B – OCTOBER 2008 – REVISED APRIL 2013

Shutdown / Standby

The LM5576Q0 contains a dual level Shutdown (SD) circuit. When the SD pin voltage is below 0.7V, the

regulator is in a low current shutdown mode. When the SD pin voltage is greater than 0.7V but less than 1.225V,

the regulator is in standby mode. In standby mode the Vcc regulator is active but the output switch is disabled.

When the SD pin voltage exceeds 1.225V, the output switch is enabled and normal operation begins. An internal

5µA pull-up current source configures the regulator to be fully operational if the SD pin is left open.

An external set-point voltage divider from VIN to GND can be used to set the operational input range of the

regulator. The divider must be designed such that the voltage at the SD pin will be greater than 1.225V when Vin

is in the desired operating range. The internal 5µA pull-up current source must be included in calculations of the

external set-point divider. Hysteresis of 0.1V is included for both the shutdown and standby thresholds. The SD

pin is internally clamped with a 1k

Ω resistor and an 8V zener clamp. The voltage at the SD pin should never

exceed 14V. If the voltage at the SD pin exceeds 8V, the bias current will increase at a rate of 1 mA/V.

The SD pin can also be used to implement various remote enable / disable functions. Pulling the SD pin below

the 0.7V threshold totally disables the controller. If the SD pin voltage is above 1.225V the regulator will be

operational.

Oscillator and Sync Capability

The LM5576Q0 oscillator frequency is set by a single external resistor connected between the RT pin and the

calculated from the following equation:

(1)

The SYNC pin can be used to synchronize the internal oscillator to an external clock. The external clock must be

output is the recommended interface from the external clock to the SYNC pin. The clock pulse duration should

be greater than 15ns.

Figure 11. Sync from External Clock

Figure 12. Sync from Multiple Devices

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