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LM97937RMER bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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LM97937RMER bảng dữ liệu(HTML) 5 Page - Texas Instruments |
5 / 80 page AGND VA3.3 + - SYSREF+ SYSREF- 1k: 0.5V 1k: 10k: AGND VA1.2 AGND VA3.3 + - CLKIN+ CLKIN- 50: 0.5V 50: 10k: AGND VA1.2 VCM VA3.3 + - + - AGND VA3.3 VIN+ VIN- + - VCM 100 100 LM97937 www.ti.com SNVS990A – DECEMBER 2013 – REVISED JANUARY 2014 PIN DESCRIPTION PIN NAME TYPE/DIAGRAM DESCRIPTION Differential analog input pins of channel A. Each input pin is terminated to the internal 4,5 VINA+, VINA– common mode reference with a resistor for an internal differential termination. Differential analog input pins of channel B. Each input pin is terminated to the internal 11,10 VINB+, VINB– common mode reference with a resistor for an internal differential termination. Input interface common mode voltage for channels A and B. These pins must be bypassed to AGND with low ESL (equivalent series inductance) 0.1 μF capacitors. One should be placed as close to the pin as possible and additional capacitors placed at the bias load points. 10 μF capacitors should also be placed in 1,14 VCMA, VCMB parallel. It is recommended to use VCMA and VCMB to provide the common mode voltage for the differential analog inputs. The input common mode bias is provided internally for the ADC input, therefore external use of VCMA and VCMB is recommended but not strictly required. The recommended bypass capacitors are always required. Differential device clock input pins. Each pin is internally terminated to a DC bias with a 50 Ω resistor for a 100 Ω total internal differential termination. AC coupling 17,18 CLKIN+, CLKIN– is required for coupling the clock input to these pins if the clock driver cannot meet the common-mode requirements. Sampling occurs on the rising edge of the differential signal (CLKIN+) − (CLKIN–). Differential SYSREF signal input pins. Each pin is internally terminated to a DC bias with a 1 k Ω resistor. An external 100 Ω differential termination must always be provided. AC coupling using capacitors is 23,24 SYSREF+, SYSREF– required for coupling the SYSREF signal to these pins if the clock driver cannot meet the common-mode requirements. In the case of AC coupling, the termination must be placed on the source side of the coupling capacitors. Copyright © 2013–2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM97937 |
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