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LM43602DSUT bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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LM43602DSUT bảng dữ liệu(HTML) 5 Page - Texas Instruments |
5 / 44 page LM43602 www.ti.com SNVSA36A – APRIL 2014 – REVISED APRIL 2014 7.4 Thermal Information HTSSOP THERMAL METRIC (1)(2) UNIT (16 PINS) RθJA Junction-to-ambient thermal resistance 38.9(3) RθJC(top) Junction-to-case (top) thermal resistance 24.3 RθJB Junction-to-board thermal resistance 19.9 °C/W ψJT Junction-to-top characterization parameter 0.7 ψJB Junction-to-board characterization parameter 19.7 RθJC(bot) Junction-to-case (bottom) thermal resistance 1.7 (1) The package thermal impedance is calculated in accordance with JESD 51-7; (2) Thermal Resistances were simulated on a 4 layer, JEDEC board. (3) See Figure 64 for θJA vs Copper Area Curve 7.5 Electrical Characteristics Limits apply over the recommended operating junction temperature (TJ) range of -40°C to +125°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 12 V, VOUT = 3.3 V, FS = 500 kHz. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT SUPPLY VOLTAGE (VIN PIN) VIN-MIN-ST Minimum input voltage for startup 3.8 V ISHDN Shutdown quiescent current VEN = 0 V 1.2 3.1 µA IQ-NONSW VEN = 3.3 V Operating quiescent current (non- VFB = 1.5 V 5.0 10 µA switching) from VIN VBIAS = 3.4 V external IBIAS-NONSW VEN = 3.3 V Operating quiescent current (non- VFB = 1.5 V 85 130 µA switching) from external VBIAS VBIAS = 3.4 V external IQ-SW VEN = 3.3 V IOUT = 0 A Operating quiescent current (switching) RT = open 27 µA VBIAS = VOUT = 3.3 V RFBT = 1.0 Meg ENABLE (EN PIN) VEN-VCC-H Voltage level to enable the internal LDO VENABLE high level 1.2 V output VCC VEN-VCC-L Voltage level to disable the internal LDO VENABLE low level 0.525 V output VCC VEN-VOUT-H Precision enable level for switching and VENABLE high level 2.00 2.2 2.42 V regulator output: VOUT VEN-VOUT-HYS Hysteresis voltage between VOUT VENABLE hysteresis -290 mV precision enable and disable thresholds ILKG-EN Enable input leakage current VEN = 3.3 V 0.85 1.75 µA INTERNAL LDO (VCC and BIAS PINS) VCC Internal LDO output voltage VCC VIN ≥ 3.8 V 3.28 V VCC-UVLO Under voltage lock out (UVLO) VCC rising threshold 3.1 V thresholds for VCC Hysteresis voltage between rising and -520 mV falling thresholds VBIAS-ON Internal LDO input change over VBIAS rising threshold 2.94 3.15 V threshold to BIAS Hysteresis voltage between rising and -75 mV falling thresholds Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM43602 |
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