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SN74ABT5403 bảng dữ liệu(PDF) 1 Page - Texas Instruments

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tên linh kiện SN74ABT5403
Giải thích chi tiết về linh kiện  12-BIT LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS
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SN74ABT5403 bảng dữ liệu(HTML) 1 Page - Texas Instruments

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SN54ABT5403, SN74ABT5403
12-BIT LINE/MEMORY DRIVERS
WITH 3-STATE OUTPUTS
SCBS236B – JUNE 1992 – REVISED JANUARY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D Typical VOLV (Output Undershoot) < 0.5 V at
VCC = 5 V, TA = 25°C
D Package Options Include Plastic
Small-Outline (DW) Package, Ceramic Chip
Carriers (FK), and DIPs (JT)
description
These 12-bit buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers,
and
bus-oriented
receivers
and
transmitters.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all 12 outputs are in the
high-impedance state. These devices provide
inverted data.
The outputs, which are designed to source or sink
up to 12 mA, include equivalent 25-
Ω series
resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The SN54ABT5403 is characterized for operation over the full military temperature range of –55
°C to 125°C.
The SN74ABT5403 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
OE1
OE2
D
Y
L
L
L
H
L
LH
L
H
XX
Z
X
H
X
Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Y1
Y2
Y3
Y4
Y5
Y6
GND
Y7
Y8
Y9
Y10
Y11
Y12
OE1
D1
D2
D3
D4
D5
D6
D7
VCC
D8
D9
D10
D11
D12
OE2
SN54ABT5403 . . . JT PACKAGE
SN74ABT5403 . . . DW PACKAGE
(TOP VIEW)
32 1 28 27
12 13 14 15 16 17 18
5
6
7
8
9
10
11
25
24
23
22
21
20
19
D10
D11
D12
OE2
OE1
Y12
Y11
D3
D2
D1
Y1
Y2
Y3
Y4
426
SN54ABT5403 . . . FK PACKAGE
(TOP VIEW)
Copyright
© 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
EPIC-
ΙΙB is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.


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