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SM320LF2407APGEMEP bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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SM320LF2407APGEMEP bảng dữ liệu(HTML) 7 Page - Texas Instruments |
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7 / 112 page  SM320LF2407AEP DSP CONTROLLERS SGUS036B − JULY 2003 − REVISED OCTOBER 2003 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 pin functions The SM320LF2407A device is the superset of all the 240xA devices. All signals are available on the 2407A device. Table 2 lists the signals available in the 240xA generation of devices. Table 2. LF240xA and LC240xA Pin List and Package Options†‡ PIN NAME LF2407A (144-PGE) DESCRIPTION EVENT MANAGER A (EVA) CAP1/QEP1/IOPA3 83 Capture input #1/quadrature encoder pulse input #1 (EVA) or GPIO ( ↑) CAP2/QEP2/IOPA4 79 Capture input #2/quadrature encoder pulse input #2 (EVA) or GPIO ( ↑) CAP3/IOPA5 75 Capture input #3 (EVA) or GPIO ( ↑) PWM1/IOPA6 56 Compare/PWM output pin #1 (EVA) or GPIO ( ↑) PWM2/IOPA7 54 Compare/PWM output pin #2 (EVA) or GPIO ( ↑) PWM3/IOPB0 52 Compare/PWM output pin #3 (EVA) or GPIO ( ↑) PWM4/IOPB1 47 Compare/PWM output pin #4 (EVA) or GPIO ( ↑) PWM5/IOPB2 44 Compare/PWM output pin #5 (EVA) or GPIO ( ↑) PWM6/IOPB3 40 Compare/PWM output pin #6 (EVA) or GPIO ( ↑) T1PWM/T1CMP/IOPB4 16 Timer 1 compare output (EVA) or GPIO ( ↑) T2PWM/T2CMP/IOPB5 18 Timer 2 compare output (EVA) or GPIO ( ↑) TDIRA/IOPB6 14 Counting direction for general-purpose (GP) timer (EVA) or GPIO. If TDIRA = 1, upward counting is selected. If TDIRA = 0, downward counting is selected. ( ↑) TCLKINA/IOPB7 37 External clock input for GP timer (EVA) or GPIO. Note that the timer can also use the internal device clock. ( ↑) EVENT MANAGER B (EVB) CAP4/QEP3/IOPE7 88 Capture input #4/quadrature encoder pulse input #3 (EVB) or GPIO ( ↑) CAP5/QEP4/IOPF0 81 Capture input #5/quadrature encoder pulse input #4 (EVB) or GPIO ( ↑) CAP6/IOPF1 69 Capture input #6 (EVB) or GPIO ( ↑) PWM7/IOPE1 65 Compare/PWM output pin #7 (EVB) or GPIO ( ↑) PWM8/IOPE2 62 Compare/PWM output pin #8 (EVB) or GPIO ( ↑) PWM9/IOPE3 59 Compare/PWM output pin #9 (EVB) or GPIO ( ↑) PWM10/IOPE4 55 Compare/PWM output pin #10 (EVB) or GPIO ( ↑) PWM11/IOPE5 46 Compare/PWM output pin #11 (EVB) or GPIO ( ↑) PWM12/IOPE6 38 Compare/PWM output pin #12 (EVB) or GPIO ( ↑) T3PWM/T3CMP/IOPF2 8 Timer 3 compare output (EVB) or GPIO ( ↑) T4PWM/T4CMP/IOPF3 6 Timer 4 compare output (EVB) or GPIO ( ↑) TDIRB/IOPF4 2 Counting direction for general-purpose (GP) timer (EVB) or GPIO. If TDIRB = 1, upward counting is selected. If TDIRB = 0, downward counting is selected. ( ↑) TCLKINB/IOPF5 126 External clock input for GP timer (EVB) or GPIO. Note that the timer can also use the internal device clock. ( ↑) † Bold, italicized pin names indicate pin function after reset. ‡ GPIO − General-purpose input/output pin. All GPIOs come up as input after reset. § It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy and improve the noise immunity of the ADC. ¶ Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high # No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper device operation. LEGEND: ↑ − Internal pullup ↓ − Internal pulldown (Typical active pullup/pulldown value is ±16 µA.) |
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