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SN74ABT373N bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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SN74ABT373N bảng dữ liệu(HTML) 1 Page - Texas Instruments |
1 / 23 page SN54ABT373, SN74ABT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS155D – JANUARY 1991 – REVISED MAY 1997 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 D Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C D High-Drive Outputs (–32-mA IOH, 64-mA IOL) D Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs description The eight latches of the ’ABT373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT373 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74ABT373 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE (each latch) INPUTS OUTPUT OE LE D Q L H H H L HL L L LX Q0 H X X Z Copyright © 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC- ΙΙB is a trademark of Texas Instruments Incorporated. SN54ABT373 ...J OR W PACKAGE SN74ABT373 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW) SN54ABT373 . . . FK PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 2D 2Q 3Q 3D 4D 8D 7D 7Q 6Q 6D |
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