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SM320C40TABS50/10 bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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SM320C40TABS50/10 bảng dữ liệu(HTML) 4 Page - Texas Instruments |
4 / 65 page SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001 4 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443 communication ports (continued) D Separate 8-word-deep input and output FIFO buffers for processor-to-processor communication and I/O D Automatic arbitration and handshaking for direct processor-to-processor connection communication-port software reset (C40 silicon revision ≥ 5.0) The input and output FIFO levels for a communication port can be flushed by writing at least two back-to-back values to its communication-port software-reset address as specified in Table 1. This feature is not present in C40 silicon revision < 5.0. This software reset flushes any word or byte already present in the FIFOs but it does not affect the status of the communication-port pins. Figure 1 shows an example of communication-port-software reset. Table 1. Communication-Port Software-Reset Address 0 0x0100043 1 0x0100053 2 0x0100063 3 0x0100073 4 0x0100083 5 0x0100093 ; -------------------------------------------------; ; RESET1:Flush’s FIFO data for communication port 1; ; -------------------------------------------------; RESET1 push AR0 ; Save registers push R0 ; push RC ; ldhi 010h,AR0 ; Set AR0 to base address of COM 1 or 050h,AR0 ; flush: rpts 1 ; Flush FIFO data with back-to-back write sti R0,*+AR0(3) ; rpts 10 ; Wait nop ; ldi *+AR0(0),R0 ; Check for new data from other port and 01FE0h,R0 ; bnz flush ; pop RC ; Restore registers pop R0 ; pop AR0 ; rets ; Return Figure 1. Example of Communication-Port-Software Reset |
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Mô tả tương tự - SM320C40TABS50/10 |
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