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LM12H458CIV bảng dữ liệu(PDF) 11 Page - Texas Instruments

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LM12454, LM12458, LM12H458
www.ti.com
SNAS079A – MAY 2004 – REVISED FEBRUARY 2006
DIGITAL TIMING CHARACTERISTICS
(1) (2) (3)
The following specifications apply to the LM12454, LM12458, and LM12H458 for VA+ = VD+ = 5V, tr = tf = 3 ns, and CL = 100
pF on data I/O, INT and DMARQ lines unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other
limits TA = TJ = 25°C.
Symbol (See
Figure 7
Parameter
Conditions
Typical (4)
Limits (5)
Units
Figure 40
Figure 42)
1, 3
CS or Address Valid to ALE Low Set-Up Time
40
ns (min)
2, 4
CS or Address Valid to ALE Low Hold Time
20
ns (min)
5
ALE Pulse Width
45
ns (min)
6
RD High to Next ALE High
35
ns (min)
7
ALE Low to RD Low
20
ns (min)
8
RD Pulse Width
100
ns (min)
9
RD High to Next RD or WR Low
100
ns (min)
10
ALE Low to WR Low
20
ns (min)
11
WR Pulse Width
60
ns (min)
12
WR High to Next ALE High
75
ns (min)
13
WR High to Next RD or WR Low
140
ns (min)
14
Data Valid to WR High Set-Up Time
40
ns (min)
15
Data Valid to WR High Hold Time
30
ns (min)
10
ns (min)
16
RD Low to Data Bus Out of TRI-STATE
40
70
ns (max)
10
ns (min)
17
RD High to TRI-STATE
RL = 1 kΩ
30
110
ns (max)
10
ns (min)
18
RD Low to Data Valid (Access Time)
30
80
ns (max)
20
Address Valid or CS Low to RD Low
20
ns (min)
21
Address Valid or CS Low to WR Low
20
ns (min)
19
Address Invalid from RD or WR High
10
ns (min)
10
ns (min)
22
INT High from RD Low
30
60
ns (max)
10
ns (min)
23
DMARQ Low from RD Low
30
60
ns (max)
(1)
Two on-chip diodes are tied to each analog input through a series resistor, as shown below. Input voltage magnitude up to 5V above
VA+ or 5V below GND will not damage the LM12454 or the LM12(H)458. However, errors in the A/D conversion can occur if these
diodes are forward biased by more than 100 mV. As an example, if VA+ is 4.5 VDC, full-scale input voltage must be ≤4.6 VDC to ensure
accurate conversions. See Figure 3
(2)
VA+ and VD+ must be connected together to the same power supply voltage and bypassed with separate capacitors at each V
+ pin to
assure conversion/comparison accuracy.
(3)
Accuracy is ensured when operating at fCLK = 5 MHz for the LM12454/8 and fCLK = 8 MHz for the LM12H458.
(4)
Typical figures are at TA = 25°C and represent most likely parametric norm.
(5)
Limits are to AOQL (Average Output Quality Level).
Figure 3.
Copyright © 2004–2006, Texas Instruments Incorporated
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