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LM10524TME-A/NOPB bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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LM10524TME-A/NOPB bảng dữ liệu(HTML) 6 Page - Texas Instruments |
6 / 44 page LM10524 SNVS986A – AUGUST 2013 – REVISED JANUARY 2014 www.ti.com Table 1. 9.0 LM10524 Pin Description (continued) Pin # Pin Name I/O(1) Type(2) Functional Description G3 VIN_B2 I P Buck Switcher Regulator 2 - Power supply voltage input for power stage PFET, if Buck 2 is not used, tie to ground to reduce leakage. H3 VIN_B2 I P Buck Switcher Regulator 2 - Power supply voltage input for power stage PFET, if Buck 2 is not used, tie to ground to reduce leakage. G5 VIN_B3 I P Buck Switcher Regulator 3 - Power supply voltage input for power stage PFET. H5 VIN_B3 I P Buck Switcher Regulator 3 - Power supply voltage input for power stage PFET.. A1 VIN_IO I A Supply Voltage for Digital Interface. Table 2. Device Information Part Number Buck 1 Bypass FPWM Default Package Type Product Supplied as Identification LM10524TME Disabled All Bucks micro SMD V088 250 Tape & Reel LM10524TMX 1000 Tape & Reel LM10524TME-A Disabled Bucks 2 + 3 micro SMD V089 250 Tape & Reel LM10524TMX-A 1000 Tape & Reel These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Pins Min Max Units VIN, VCOMP -0.3 6 V VIN_IO, VIN_B1, VIN_B2, VIN_B3, SPI_CS, SPI_DI, SPI_CLK, SPI_DO, DEVSLP, -0.3 VVIN DEVSLP_CTRL, SLEEP_EN, POWERUP MODE, SW_1, SW_2, SW_3, FB_1, FB_2, FB_3, PWR_OK, IRQ, DEVSLP_OVR1, DEVSLP_OVR2 Junction Temperature, TJ-MAX 150 °C Storage Temperature -65 150 ESD Rating, HBM – Human Body Model 1 kV (1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and associated test conditions, see the Electrical Characteristics tables. (2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. Operating Ratings (1) (2) (3) Pins Min Max Units VIN_B1, VIN_B2, VIN_B3, VIN 3 5.5 V VIN_IO 1.72 VVIN All other Input Pins 0 VVIN Junction Temperature, TJ -30 125 °C Ambient Temperature, TA -30 85 Junction-to-Ambient Thermal resistance, θJA 40 °C/W Maximum Continuous Power Dissipation, PDMAX 1 W (1) Internal thermal shutdown protects device from permanent damage. Thermal shutdown engages at TJ = +140°C and disengages at TJ = +120°C (typ.). Thermal shutdown is ensured by design. (2) In applications where high power dissipation and/or poor thermal resistance is present the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junvction temperature (TJ-MAX-OP = +125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the part/package in the application ( θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). (3) The amount of Absolute Maximum power dissipation allowed for the device depends on the ambient temperature and can be calculated using the formula: P = (TJ–TA)/θJA, where TJ is the junction temperature, TA is the ambient temperature, and θJA is the junction-to- ambient thermal resistance. θJA is highly application and board-layout dependent. Internal thermal shutdown circuitry protects the device from permanent damage. (See General Electrical Characteristics). 6 Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: LM10524 |
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