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54ACT11640 bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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54ACT11640 bảng dữ liệu(HTML) 4 Page - Texas Instruments |
4 / 6 page 74ACT11643 OCTAL BUS TRANSCEIVER WITH 3STATE OUTPUTS SCAS051A − D2957, JULY 1987 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per transceiver Outputs enabled CL = 50 pF, f = 1 MHz 45 pF Cpd Power dissipation capacitance per transceiver Outputs disabled CL = 50 pF, f = 1 MHz 12 pF PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 2 X VCC Open GND 500 Ω 500 Ω TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND tPHL tPLH PROPAGATION DELAY TIMES Output Control (Low-level Enabling) Output Waveform 1 S1 at 2 x VCC (see Note C) Output Waveform 2 S1 at GND (see Note C) VOL VOH tPZL tPZH tPLZ tPHZ 1.5 V 1.5 V 1.5 V 1.5 V VCC 3 v 0 50% 50% VOH VOL 0 50% 20% 50% 80% VOL ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS 3 V Input (see Note B) In-Phase Output NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms |
Số phần tương tự - 54ACT11640 |
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Mô tả tương tự - 54ACT11640 |
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