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ADS7823EB/250 bảng dữ liệu(PDF) 11 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Sampling A/D Converter
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ADS7823EB/250 bảng dữ liệu(HTML) 11 Page - Texas Instruments

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ADS7823
11
SBAS180B
MSB
6
5
43
21
LSB
BYTE0
0
0
0
0
D11
D10
D9
D8
BYTE1
D7
D6
D5
D4
D3
D2
D1
D0
READING DATA
Data can be read from the ADS7823 by read-addressing the
part (LSB of address byte set to 1) and receiving the
transmitted bytes. Converted data can only be read from the
ADS7823 once a conversion has been initiated as described
in the preceding section.
Each 12-bit data word is returned in two bytes, as shown
below, where D11 is the MSB of the data word, and D0 is the
LSB. Byte 0 is sent first, followed by Byte 1.
READING IN F/S MODE
In Fast and Standard (F/S) modes, the A/D converter has
time to make four complete conversions between the recep-
tion of bit 5 of the command byte and the complete reception
of the read address, even when operating in Fast mode.
Because the ADS7823 can perform these conversions much
faster than they can be transmitted in F/S mode, data is
stored in a four-level FILO. During the read operation, the A/
D converter is powered down and the contents of the stack
are read out one by one in the correct order.
A typical transfer sequence for reading four words of data in
F/S mode (see Figure 3). Note that the master sends a not-
acknowledge after the fourth data word has been read. This
tells the ADS7823 that no further reads will be performed. No
more than four data words should be read at a time; further
reads will return undefined data.
Although a STOP condition is shown at the end of the figure,
it is permissible to issue a repeated START; this will have the
same effect.
READING IN HS MODE
High Speed (HS) mode is fast enough that codes can be
read out one at a time, without employing the FILO. In HS
mode there is not enough time for a single conversion to
complete between the reception of command bit 5 and the
read address byte, so the ADS7823 stretches the clock after
the command byte has been fully received, holding it LOW
until the conversion is complete.
A typical read sequence for HS mode is shown in Figure 4.
Included in the read sequence is the shift from
F/S to HS modes. It may be desirable to remain in HS mode
after reading a code; to do this, issue a repeated START
instead of a STOP at the end of the read sequence, since a
STOP causes the part to return to F/S mode.
It is very important not to read more than one code at a time
from the ADS7823 during HS mode. If codes are read out
more than one at a time, as in F/S mode, the results for all
codes (except the first) are undefined, and the data stream
will be corrupt.
FIGURE 4. Typical Read Sequence in HS Mode.
Sr
100
10
A1 A0
R
A
00
00
D11 D10 D9 D8
AD7 D6 . . .D1 D0
NP
Read-AddressingByte
(see Note A)
2
×(8 bits + ack/not-ack)
From master to slave
From slave to master
ADC Power-Down Mode
W = 0 (WRITE)
R = 1 (READ)
SX
00
001
X
X
N
F/S Mode
HS Mode Master Code
Sr
A1
10
010
A0
W
A
000X
X
X
X
X
A
Write-Addressing Byte
Command Byte
ADC Wake-Up Mode
SCLH is stretched in wait-state
HS Mode Enabled
ADC Power-Down Mode
HS Mode Enabled
Return to
F/S Mode
See Note B
A = acknowledge (SDA Low)
N = not-acknowledge (SDA High)
S = START Condition
P = STOP Condition
Sr = repeated START Condition
NOTES: (A) Failure for master to send read-addressing byte—setting R/W flag to “1”—will result in internal clock remaining ON, increasing power consumption.
(B) Use repeated START to remain in HS mode instead of STOP.


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