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ADS821UG4 bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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ADS821UG4 bảng dữ liệu(HTML) 2 Page - Texas Instruments |
2 / 20 page www.ti.com ADS821 2 SBAS040B RESOLUTION 10 Bits Specified Temperature Range TAMBIENT –40 +85 °C ANALOG INPUT Differential Full-Scale Input Range +1.25 +3.25 V Common-Mode Voltage +2.25 V Analog Input Bandwidth (–3dB) Small-Signal –20dBFS(1) Input +25 °C 400 MHz Full-Power 0dBFS Input +25 °C65 MHz Input Impedance 1.25 || 4 M Ω || pF DIGITAL INPUT Logic Family Convert Command Start Conversion ACCURACY(2) Gain Error +25 °C ±0.6 ±1.5 % Full ±1.1 ±2.5 % Gain Drift ±85 ppm/ °C Power-Supply Rejection of Gain ∆ +V S = ±5% +25 °C 0.01 0.15 %FSR/% Input Offset Error Full ±2.1 ±3.5 % Power-Supply Rejection of Offset ∆ +V S = ±5% +25 °C 0.02 0.15 %FSR/% CONVERSION CHARACTERISTICS Sample Rate 10k 40M Sample/s Data Latency 6.5 Convert Cycle DYNAMIC CHARACTERISTICS Differential Linearity Error tH = 13ns(3) f = 500kHz +25 °C ±0.5 ±1.0 LSB 0 °C to +70°C ±0.6 ±1.0 LSB f = 12MHz +25 °C ±0.5 ±1.0 LSB 0 °C to +70°C ±0.6 ±1.0 LSB No Missing Codes 0 °C to +70°C Tested Integral Linearity Error at f = 500kHz 0 °C to +70°C ±0.5 ±2.0 LSB Spurious-Free Dynamic Range (SFDR) f = 500kHz (–1dBFS input) +25 °C 60 70 dBFS Full 54 67 dBFS f = 12MHz (–1dBFS input) +25 °C 58 63 dBFS Full 54 62 dBFS ADS821U PARAMETER CONDITIONS TEMP MIN TYP MAX UNITS ELECTRICAL CHARACTERISTICS At TA = +25°C, VS = +5V, Sampling Rate = 40MHz, and with a 50% duty cycle clock having a 2ns rise-and-fall time, unless otherwise noted. ABSOLUTE MAXIMUM RATINGS(1) +VS ....................................................................................................... +6V Analog Input ............................................................ 0V to (+VS + 300mV) Logic Input ............................................................... 0V to (+VS + 300mV) Case Temperature ......................................................................... +100 °C Junction Temperature .................................................................... +150 °C Storage Temperature .................................................................... +125 °C External Top Reference Voltage (REFT) ................................. +3.4V max External Bottom Reference Voltage (REFB) ............................ +1.1V min NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY ADS821 SO-8 DW –40 °C to +85°C ADS821U ADS821U Rails, 28 "" " " " ADS821U/1K Tape and Reel, 1000 PACKAGE/ORDERING INFORMATION(1) NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. TTL/HCT Compatible CMOS Falling Edge NOTES: (1) dBFS refers to dB below Full-Scale. (2) Percentage accuracies are referred to the internal A/D converter Full-Scale Range of 4Vp-p. (3) Refer to Timing Diagram footnotes for the differential linearity performance conditions for the SO and SSOP packages. (4) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal ( ≈ 0dB), the intermodulation products will be 7dB lower. (5) Based on (SINAD – 1.76)/6.02. (6) No “rollover” of bits. |
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Mô tả tương tự - ADS821UG4 |
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