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ADS7813UBG4 bảng dữ liệu(PDF) 3 Page - Texas Instruments

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ADS7813UBG4 bảng dữ liệu(HTML) 3 Page - Texas Instruments

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ADS7813
3
SBAS043C
www.ti.com
SAMPLING DYNAMICS
Aperture Delay
40
ns
Aperture Jitter
20
ps
Transient Response
FS Step
5
µs
Overvoltage Recovery(7)
750
ns
REFERENCE
Internal Reference Voltage
2.48
2.5
2.52
✻✻
V
Internal Reference Source Current
100
µA
Internal Reference Drift
8
ppm/
°C
External Reference Voltage Range
2.3
2.5
2.7
✻✻
V
External Reference Current Drain
VREF = +2.5V
100
µA
CAP Compensation Capacitors ESR(8)
3
DIGITAL INPUTS
Logic Levels
VIL
–0.3
+0.8
✻✻
V
VIH(9)
+2.0
VS +0.3V
✻✻
V
IIL
±10
µA
IIH
±10
µA
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
ISINK = 1.6mA
+0.4
V
VOH
ISOURCE = 500µA+4
V
Leakage Current
High-Z State,
±1
µA
VOUT = 0V to VS
Output Capacitance
High-Z State
15
15
pF
POWER SUPPLY
VS
+4.75
+5
+5.25
✻✻
V
Power Dissipation
fS = 40kHz
35
mW
TEMPERATURE RANGE
Specified Performance
–40
+85
✻✻
°C
Derated Performance
–55
+125
✻✻
°C
✻ Same specification as grade to the left.
NOTES:
ELECTRICAL CHARACTERISTICS (Cont.)
At TA = –40°C to +85°C, fS = 40kHz, VS = +5V ±5%, using internal reference, unless otherwise specified.
ADS7813P, U
ADS7813PB, UB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Serial
Binary Two’s Complement
(1) LSB means Least Significant Bit. For the
±10V input range, one LSB is 305µV.
(2) Typical rms noise at worst case transitions and temperatures.
(3) Full scale error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided by the
transition voltage (not divided by the full-scale range) and includes the effect of offset error.
(4) After the ADS7813 is initially powered on and fully settles, this is the time delay after it is brought out of Power Down Mode until all internal
settling occurs and the analog input is acquired to rated accuracy, and normal conversions can begin again.
(5) All specifications in dB are referred to a full-scale input.
(6) Useable Bandwidth defined as Full-Scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy.
(7) Recovers to specified performance after 2 x FS input overvoltage.
(8) ESR = total equivalent series resistance for the compensation capacitors.
(9) The minimum VIH level for the DATACLK signal is 3V.


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