ADC122S706 datasheet(6/31 Pages) TI1

tên linh kiện	ADC122S706

Giải thích chi tiết về linh kiện	Dual 12-Bit, 500 kSPS to 1 MSPS, Simultaneous Sampling A/D Converter

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ADC122S706

SNAS408A – NOVEMBER 2007 – REVISED MARCH 2013

www.ti.com

ADC122S706 Converter Electrical Characteristics

(1) (continued)

The following specifications apply for VA = +4.5V to 5.5V, VD = +2.7V to VA, VREF = 2.5V, fSCLK = 8 to 16 MHz, DUAL = VD, fIN

= 100 kHz, CL = 25 pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX; all other limits are at TA = 25°C.

Symbol

Parameter

Conditions

Typical

Limits

Units(2)

POWER SUPPLY CHARACTERISTICS

4.5

V (min)

VA

Analog Supply Voltage

5.5

V (max)

2.7

V (min)

VD

Digital Supply Voltage

VA

V (max)

Analog Supply Current, Continuously

fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz,

3.3

4.2

mA (max)

Converting (Dual Data Output Mode)

VA = 5V, DUAL = VD

IVA

Analog Supply Current, Continuously

(Conv)

fSCLK = 16 MHz, fS = 500 kSPS, fIN = 100 kHz,

Converting (Single Data Output

1.8

2.9

mA (max)

VA = 5V, DUAL = 0V

Mode)

fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz,

1.7

2.0

mA (max)

VD = 5V, DUAL = 5V

Digital Supply Current, Continuously

Converting (Dual Data Output Mode)

fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz,

1.0

1.3

mA (max)

VD = 3V, DUAL = 3V

IVD

(Conv)

fSCLK = 16 MHz, fS = 500 kSPS, fIN = 100 kHz,

0.9

1.2

mA (max)

Digital Supply Current, Continuously

VD = 5V, DUAL = 0V

Converting (Single Data Output

fSCLK = 16 MHz, fS = 500 kSPS, fIN = 100 kHz,

Mode)

0.6

0.7

mA (max)

VD = 3V, DUAL = 0V

Reference Current, Continuously

fSCLK = 16 MHz, fS = 1 MSPS, VREF = 2.5V,

90

105

µA (max)

Converting (Dual Data Output Mode)

DUAL = VD

IVREF

Reference Current, Continuously

(Conv)

fSCLK = 16 MHz, fS = 500 kSPS, VREF = 2.5V,

Converting (Single Data Output

45

60

µA (max)

DUAL = 0V

Mode)

fSCLK = 16 MHz, VA = 5.0V

10

µA

Analog Supply Current, Power Down

IVA (PD)

Mode (CS high)

fSCLK = 0, VA = 5.0V

(4)

0.5

1

µA (max)

fSCLK = 16 MHz, VD = 5.0V

10

µA

Digital Supply Current, Power Down

IVD (PD)

Mode (CS high)

fSCLK = 0

(4)

0.1

0.2

µA (max)

fSCLK = 16 MHz

0.05

µA

IVREF

Reference Current, Power Down

(PD)

Mode (CS high)

fSCLK = 0

(4)

0.05

0.1

µA (max)

fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz,

25

31.3

mW (max)

VA = VD = 5V, VREF = 2.5V, DUAL = VD

Power Consumption, Continuously

Converting (Dual Data Output Mode)

fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz,

20

25.2

mW (max)

VA = 5V, VD = 3V, VREF = 2.5V, DUAL = VD

PWR

(Conv)

fSCLK = 16 MHz, fS = 500 kSPS, fIN = 100 kHz,

13.6

20.6

mW (max)

Power Consumption, Continuously

VA = VD = 5V, VREF = 2.5V, DUAL = 0V

Converting (Single Data Output

fSCLK = 16 MHz, fS = 500 kSPS, fIN = 100 kHz,

Mode)

10.9

16.8

mW (max)

VA = 5V, VD = 3V, VREF = 2.5V, DUAL = 0V

fSCLK = 16 MHz, VA = VD = 5.0V, VREF = 2.5V

100

µW

PWR

Power Consumption, Power Down

(PD)

Mode (CS high)

fSCLK = 0, VA = VD = 5.0V, VREF = 2.5V

3.1

6.5

µW (max)

PSRR

Power Supply Rejection Ratio

See the Specification Definitions

−85

dB

AC ELECTRICAL CHARACTERISTICS

fSCLK

Maximum Clock Frequency

20

16

MHz (min)

fSCLK

Minimum Clock Frequency

0.8

8

MHz (max)

fS

Maximum Sample Rate(5)

1.25

1

MSPS (min)

tACQ

Track/Hold Acquisition Time

3

SCLK cycles

tCONV

Conversion Time

12

SCLK cycles

tAD

Aperture Delay

6

ns

(4)

Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis.

(5)

While the maximum sample rate is fSCLK/16, the actual sample rate may be lower than this by having the CS rate slower than fSCLK/16.

6

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