74AC11194

4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER

SCAS093 − NOVEMBER 1989 − REVISED APRIL 1993

7

POST OFFICE BOX 655303

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

CL = 50 pF

(see Note A)

500

Ω

LOAD CIRCUIT

Input

(see Note B)

In-Phase

Output

Out-of-Phase

Output

tPLH

tPHL

tPHL

tPLH

PROPAGATION DELAY TIMES

VOH

VOH

VOL

VOL

50% VCC

0 V

0 V

0 V

High-Level

Input

Low-Level

Input

tw

PULSE DURATION

50%

VCC

0 V

0 V

th

tsu

SETUP AND HOLD TIMES

Data

Input

Timing Input

(see Note B)

50% VCC

50% VCC

50% VCC

50%

50%

VCC

VCC

50%

50%

50%

50%

VCC

VCC

50%

50%

NOTES: A. CL includes probe and jig capacitance.

B. Input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. For testing

fmax and pulse duration: tr = 1 to 3 ns, tf = 1 to 3 ns.

C. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms