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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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KMPC870CZT133 bảng dữ liệu(PDF) 5 Page - Freescale Semiconductor, Inc |
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KMPC870CZT133 bảng dữ liệu(HTML) 5 Page - Freescale Semiconductor, Inc |
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5 / 84 page  MPC875/MPC870 Hardware Specifications, Rev. 3.0 Freescale Semiconductor PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE 5 Features – CRC16 generation and checking – CRC5 checking – NRZI encoding/decoding with bit stuffing – 12- or 1.5-Mbps data rate – Flexible data buffers with multiple buffers per frame – Automatic retransmission upon transmit error — The USB host controller has the following features: – Supports control, bulk, interrupt, and isochronous data transfers – CRC16 generation and checking – NRZI encoding/decoding with bit stuffing – Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and data rate configuration). Note that low-speed operation requires an external hub. – Flexible data buffers with multiple buffers per frame – Supports local loopback mode for diagnostics (12 Mbps only) • Serial peripheral interface (SPI) — Supports master and slave modes — Supports multiple-master operation on the same bus • Inter-integrated circuit (I2C) port — Supports master and slave modes — Supports a multiple-master environment • The MPC875 has a time-slot assigner (TSA) that supports one TDM bus (TDMb). — Allows SCC and SMC to run in multiplexed and/or non-multiplexed operation — Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined — 1- or 8-bit resolution — Allows independent transmit and receive routing, frame synchronization, and clocking — Allows dynamic changes — Can be internally connected to two serial channels (one SCC and one SMC) • PCMCIA interface — Master (socket) interface, release 2.1-compliant — Supports one independent PCMCIA socket on the MPC875/MPC870 — 8 memory or I/O windows supported • Debug interface — Eight comparators: four operate on instruction address, two operate on data address, and two operate on data — Supports conditions: = ≠ < > — Each watchpoint can generate a break point internally. • Normal high and normal low power modes to conserve power • 1.8-V core and 3.3-V I/O operation with 5-V TTL compatibility • The MPC875/870 comes in a 256-pin ball grid array (PBGA) package. |
Số phần tương tự - KMPC870CZT133 |
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Mô tả tương tự - KMPC870CZT133 |
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