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AD7091R-8BRUZ-RL7 bảng dữ liệu(PDF) 4 Page - Analog Devices

tên linh kiện AD7091R-8BRUZ-RL7
Giải thích chi tiết về linh kiện  2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC
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AD7091R-8BRUZ-RL7 bảng dữ liệu(HTML) 4 Page - Analog Devices

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AD7091R-2/AD7091R-4/AD7091R-8
Data Sheet
Rev. C | Page 4 of 42
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
CONVERSION RATE
Conversion Time
600
ns
Transient Response
Full-scale step input
400
ns
Throughput Rate
1
MSPS
POWER REQUIREMENTS
VDD
2.7
5.25
V
VDRIVE
Specified performance
2.7
5.25
V
VDRIVE Range4
Functional
1.8
5.25
V
IDD
VIN = 0 V
Normal Mode—Static5
VDD = 5.25 V
22
50
µA
VDD = 3 V
21.6
46
µA
Normal Mode—Operational
VDD = 5.25 V, fSAMPLE = 1 MSPS
500
570
µA
VDD = 3 V, fSAMPLE = 1 MSPS
450
530
µA
Power-Down Mode
VDD = 5.25 V
0.550
17
µA
VDD = 5.25 V, TA = −40°C to +85°C
0.550
6
µA
VDD = 3 V
0.435
15
µA
IDRIVE
VIN = 0 V
Normal Mode—Static6
VDRIVE = 5.25 V
2
4
µA
VDRIVE = 3 V
1
3.5
µA
Normal Mode—Operational
VDRIVE = 5.25 V, fSAMPLE = 1 MSPS
30
70
µA
VDRIVE = 3 V, fSAMPLE = 1 MSPS
10
15
µA
Power-Down Mode
VDRIVE = 5.25 V
1
µA
VDRIVE = 3 V
1
µA
Total Power Dissipation7
VIN = 0 V
Normal Mode—Static
VDD = VDRIVE = 5.25 V
0.130
0.290
mW
VDD = VDRIVE = 3 V
0.070
0.149
mW
Normal Mode—Operational
VDD = VDRIVE = 5.25 V, fSAMPLE = 1 MSPS
2.8
3.4
mW
VDD = VDRIVE = 3 V, fSAMPLE = 1 MSPS
1.4
1.7
mW
VDD = VDRIVE = 3 V, fSAMPLE = 100 SPS
0.080
mW
Power-Down Mode
VDD = 5.25 V
3
95
µW
VDD = 5.25 V, TA = −40°C to +85°C
3
33
µW
VDD = VDRIVE = 3 V
1.4
50
µW
1
Multiplexer input voltage should not exceed VDD.
2
Sample tested during initial release to ensure compliance.
3
When referring to a single function of a multifunction pin in the parameters, only the portion of the pin name that is relevant to the specification is listed. For full pin
names of multifunction pins, refer to the Pin Configurations and Function Descriptions section.
4
Device is functional and meets dynamic performance/dc accuracy specifications with VDRIVE down to 1.8 V, but the device is not capable of achieving a throughput of
1 MSPS.
5
SCLK operates in burst mode, and CS idles high. With a free running SCLK and CS pulled low, the IDD static current is increased by 30 µA typical at VDD = 5.25 V.
6
SCLK operates in burst mode, and CS idles high. With a free running SCLK and CS pulled low, the IDRIVE static current is increased by 32 µA typical at VDRIVE = 5.25 V.
7
Total power dissipation includes contributions from VDD, VDRIVE, and REFIN (see Note 2).


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