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ADS1220IPWR bảng dữ liệu(PDF) 5 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Low-Power, Low-Noise, 24-Bit, ADC for Small-Signal Sensors
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ADS1220IPWR bảng dữ liệu(HTML) 5 Page - Texas Instruments

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ADS1220
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SBAS501B – MAY 2013 – REVISED FEBRUARY 2015
6.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
POWER SUPPLY
AVDD to AVSS
2.3
5.5
V
Unipolar analog power supply
AVSS to DGND
–0.1
0
0.1
V
AVDD to DGND
2.3
2.5
2.75
V
Bipolar analog power supply
AVSS to DGND
–2.75
–2.5
–2.3
V
Digital power supply
DVDD to DGND
2.3
5.5
V
ANALOG INPUTS(1)
VIN
Differential input voltage
VIN = V(AINP) – V(AINN)
(2)
–Vref / Gain
Vref / Gain
V
PGA disabled, gain = 1 to 4
AVSS – 0.1
AVDD + 0.1
V
V(AINx)
Absolute input voltage
PGA enabled, gain = 1 to 128
See the Low-Noise PGA section
PGA disabled, gain = 1 to 4
AVSS – 0.1
AVDD + 0.1
V
VCM
Common-mode input voltage
PGA enabled, gain = 1 to 128
See the Low-Noise PGA section
VOLTAGE REFERENCE INPUTS(3)
Vref
Differential reference input voltage
Vref = V(REFPx) – V(REFNx)
0.75
2.5
AVDD
V
V(REFNx)
Absolute negative reference voltage
AVSS – 0.1
V(REFPx) – 0.75
V
V(REFPx)
Absolute positive reference voltage
V(REFNx) + 0.75
AVDD + 0.1
V
EXTERNAL CLOCK SOURCE
f(CLK)
External clock frequency
0.5
4.096
4.5
MHz
Duty cycle
40%
60%
DIGITAL INPUTS
Input voltage
DGND
DVDD
V
TEMPERATURE RANGE
TA
Operating ambient temperature
–40
125
°C
(1)
AINP and AINN denote the positive and negative inputs of the PGA. AINx denotes one of the four available analog inputs.
PGA disabled means the low-noise PGA is powered down and bypassed. Gains of 1, 2, and 4 are still possible in this case.
See the Bypassing the PGA section for more information.
(2)
Excluding the effects of offset and gain error.
Limited to ±[(AVDD – AVSS) – 0.4 V] / Gain, when the PGA is enabled.
(3)
REFPx and REFNx denote one of two available differential reference input pairs.
6.4 Thermal Information
ADS1220
THERMAL METRIC(1)
VQFN (RVA)
TSSOP (PW)
UNIT
16 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
43.4
99.5
RθJC(top)
Junction-to-case (top) thermal resistance
47.3
35.2
RθJB
Junction-to-board thermal resistance
18.4
44.3
°C/W
ψJT
Junction-to-top characterization parameter
0.6
2.4
ψJB
Junction-to-board characterization parameter
18.4
43.8
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.0
n/a
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2013–2015, Texas Instruments Incorporated
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