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ADC34J23IRGZ25 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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ADC34J23IRGZ25 bảng dữ liệu(HTML) 1 Page - Texas Instruments |
1 / 88 page ±120 ±100 ±80 ±60 ±40 ±20 0 0 16 32 48 64 80 Frequency (MHz C001 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADC34J22, ADC34J23, ADC34J24, ADC34J25 SBAS669A – MAY 2014 – REVISED JANUARY 2015 ADC34J2x Quad-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD204B Interface 1 Features 3 Description The ADC34J2x are a high-linearity, ultra-low power, 1 • Quad Channel dual-channel, 12-bit, 50-MSPS to 160-MSPS, analog- • 12-Bit Resolution to-digital converter (ADC) family. The devices are • Single 1.8-V Supply designed specifically to support demanding, high input frequency signals with large dynamic range • Flexible Input Clock Buffer with Divide-by-1, -2, -4 requirements. A clock input divider allows more • SNR = 69.6 dBFS, SFDR = 86 dBc at flexibility for system clock architecture design while fIN = 70 MHz the SYSREF input enables complete system • Ultra-Low Power Consumption: synchronization. The devices support JESD204B interfaces in order to reduce the number of interface – 203 mW/Ch at 160 MSPS lines, thus allowing for high system integration • Channel Isolation: 105 dB density. The JESD204B interface is a serial interface, • Internal Dither where the data of each ADC are serialized and output • JESD204B Serial Interface: over only one differential pair. An internal phase- locked loop (PLL) multiplies the incoming ADC – Subclass 0, 1, 2 Compliant up to 3.2 Gbps sampling clock by 20 to derive the bit clock that is – Supports One Lane per ADC up to 160 MSPS used to serialize the 12-bit data from each channel. • Support for Multi-Chip Synchronization The devices support subclass 1 with interface speeds up to 3.2 Gbps. • Pin-to-Pin Compatible with 14-Bit Version • Package: VQFN-48 (7 mm × 7 mm) Device Information(1) SAMPLING RATE PART NUMBER PACKAGE 2 Applications (MSPS) • Multi-Carrier, Multi-Mode Cellular Base Stations ADC34J22 50 ADC34J23 80 • Radar and Smart Antenna Arrays VQFN (48) ADC34J24 125 • Munitions Guidance ADC34J25 160 • Motor Control Feedback (1) For all available packages, see the orderable addendum at • Network and Vector Analyzers the end of the datasheet. • Communications Test Equipment • Nondestructive Testing FFT with Dither On • Microwave Receivers (fS = 160 MSPS, fIN = 10 MHz, SNR = 70.3 dBFS, • Software Defined Radios (SDRs) SFDR = 84 dBc) • Quadrature and Diversity Radio Receivers 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
Số phần tương tự - ADC34J23IRGZ25 |
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Mô tả tương tự - ADC34J23IRGZ25 |
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