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ADC12451883 bảng dữ liệu(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện ADC12451883
Giải thích chi tiết về linh kiện  Dynamically-Tested Self-Calibrating 12-Bit Plus Sign A/D Converter with Sample-and-Hold
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nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
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ADC12451883 bảng dữ liệu(HTML) 4 Page - National Semiconductor (TI)

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Digital and DC Electrical Characteristics
The following specifications apply for DVCC e AVCC ea50V Vb eb50V VREF ea50V and fCLK e 35 MHz unless
otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits TA e TJ e 25 C (Notes 6 and 7)
Symbol
Parameter
Condition
Typical
Limit
Units
(Note 9)
(Note 10 19)
(Limit)
VIN(1)
Logical ‘‘1’’ Input Voltage for
VCC e 525V
20
V(min)
All Inputs except CLK IN
VIN(0)
Logical ‘‘0’’ Input Voltage for
VCC e 475V
08
V(max)
All Inputs except CLK IN
IIN(1)
Logical ‘‘1’’ Input Current
VIN e 5V
0005
1
m
A(max)
IIN(0)
Logical ‘‘0’’ Input Current
VIN e 0V
b
0005
b
1
m
A(max)
VTa
CLK IN Positive-Going
28
27
V(min)
Threshold Voltage
VTb
CLK IN Negative-Going
21
23
V(max)
Threshold Voltage
VH
CLK IN Hysteresis
07
04
V(min)
VTa(min) b VTb(max)
VOUT(1)
Logical ‘‘1’’ Output Voltage
VCC e 475V
IOUT eb360 mA
24
V(min)
IOUT eb10 mA
45
V(min)
VOUT(0)
Logical ‘‘0’’ Output Voltage
VCC e 475V
04
V(max)
IOUT e 16 mA
IOUT
TRI-STATE Output Leakage
VOUT e 0V
b
001
b
3
m
A(max)
Current
VOUT e 5V
001
3
m
A(max)
ISOURCE
Output Source Current
VOUT e 0V
b
20
b
60
mA(min)
ISINK
Output Sink Current
VOUT e 5V
20
80
mA(min)
DICC
DVCC Supply Current
CS e ‘‘1’’
1
25
mA(max)
AICC
AVCC Supply Current
CS e ‘‘1’’
28
10
mA(max)
Ib
Vb Supply Current
CS e ‘‘1’’
28
10
mA(max)
AC Electrical Characteristics
The following specifications apply for DVCC e AVCC ea50V Vb eb50V tr e tf e 20 ns unless otherwise specified
Boldface limits apply for TA e TJ e TMIN to TMAX all other limits TA e TJ e 25 C (Notes 6 and 7)
Symbol
Parameter
Conditions
Typical
Limit
Units
(Note 9)
(Note 10 19)
(Limit)
fCLK
Clock Frequency
MHz
05
MHz(min)
60
35
MHz(max)
Clock Duty Cycle
50
%
40
%(min)
60
%(max)
tC
Conversion Time using WR
27(1fCLK)
27(1fCLK) a 250 ns
(max)
to start a Conversion
fCLK e 35 MHz AZ e ‘‘1’’
77
795
m
s(max)
fCLK e 175 MHz AZ e ‘‘0’’
154
1565
m
s(max)
tC
Conversion Time using S H
AZ e ‘‘1’’
34(1fCLK)
34(1fCLK) a250 ns
(max)
to start a Conversion
fCLK e 35 MHz AZ e ‘‘1’’
97
995
m
s(max)
4


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