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LM53600NQDSXRQ1 bảng dữ liệu(PDF) 9 Page - Texas Instruments |
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LM53600NQDSXRQ1 bảng dữ liệu(HTML) 9 Page - Texas Instruments |
9 / 44 page 9 LM53600-Q1, LM53601-Q1 www.ti.com SNAS660B – JUNE 2015 – REVISED FEBRUARY 2016 Product Folder Links: LM53600-Q1 LM53601-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated System Characteristics (continued) The following specifications are ensured by design provided that the component values in the typical application circuit are used. These parameters are not ensured by production testing. Limits apply over the recommended operating junction temperature range of –40°C to +150°C, unless otherwise noted. Minimum and Maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at Tj = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: Vin = 13.5 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDROP2 Minimum input to output voltage differential to maintain FSW ≥ 1.85 MHz, without inductor DCR drop VOUT = 3.3 V, IOUT=1000 mA, FSW = 1.85 MHz, 2% regulation accuracy 2.0 V Efficiency Typical Efficiency without inductor loss VIN = 13.5 V, VOUT = 5.0 V, IOUT = 1 A 85% VIN = 13.5 V, VOUT = 3.3 V, IOUT = 1 A 80% VIN = 13.5 V, VOUT = 5.0 V, IOUT = 0.65 A 86% VIN = 13.5 V, VOUT = 3.3 V, IOUT = 0.65 A 83% (1) See Detailed Description (2) Ensured by design, statistical analysis and production testing of correlated parameters; not tested in production. 7.7 Timing Requirements Limits apply over the recommended operating junction temperature range of –40°C to 150°C, unless otherwise noted. Minimum and Maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at Tj = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: Vin = 13.5 V. MIN NOM MAX UNIT ton Minimum switch on time(1) VIN = 18 V, IOUT = 500 mA 50 80.5 ns toff Minimum switch off time(1) IOUT = 500 mA 90 125 treset_act Delay time to RESET high signal 4 6 8 ms treset_filter Glitch filter time constant for RESET function 24 µs tSS Soft-start time Time from first SW node pulse to Vref at 90%, VIN ≥4.2 V 1.3 3 4.5 ms tEN Turn-on delay(2) Time from EN high until first SW node pulse. VIN = 13.5, Cvcc = 1 µF 0.7 ms tW Short circuit wait time (Hiccup time) 4.5 ms |
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Mô tả tương tự - LM53600NQDSXRQ1 |
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