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LM25037MT bảng dữ liệu(PDF) 11 Page - Texas Instruments |
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LM25037MT bảng dữ liệu(HTML) 11 Page - Texas Instruments |
11 / 37 page LM25037, LM25037-Q1 www.ti.com SNVS572E – JULY 2008 – REVISED JANUARY 2016 Feature Description (continued) 7.3.5 Cycle-By-Cycle Current Limit The CS pin is to be driven by a signal representative of the transformer primary current. The current sense signal can be generated by using a sense resistor or a current sense transformer. If the voltage sensed at the CS pin exceeds 0.255 V, the current sense comparator terminates the output driver pulse. If the high current condition persists, the controller operates in a cycle-by-cycle current limit mode with duty cycle determined by the current sense comparator instead of the PWM comparator. Cycle-by-cycle current limiting may eventually trigger the hiccup mode restart cycle; depending on the configuration of the RES pin (see Overload Protection Timer). To suppress noise, TI recommends connecting a small R-C filter to the CS pin and placing it near the controller. An internal 21- Ω MOSFET discharges the external current sense filter capacitor at the conclusion of every cycle. The discharge MOSFET remains on for an additional 65 ns after either OUTA or OUTB driver switches high to blank leading edge transients in the current sensing circuit. Discharging the CS pin filter each cycle and blanking leading edge spikes reduces the filtering requirements and improves the current sense response time. The current sense comparator is very fast and may respond to short duration noise pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the CS filter must be placed very close to the device and connected directly to the CS and AGND pins. If a sense resistor located in the source of the main MOSFET switch is used for current sensing, a low inductance type of resistor is required. When designing with a current sense resistor, all the noise sensitive, low power ground connections should be connected together near the AGND pin, and a single connection should be made to the power ground (sense resistor ground point). 7.3.6 Overload Protection Timer The LM25037 provides a current limit restart timer to disable the outputs and force a delayed restart (hiccup mode) if a current limit condition is repeatedly sensed. The number of cycle-by-cycle current limit events required to trigger the restart is programmed by the external capacitor at the RES pin. During each PWM cycle, the LM25037 either sources to or sinks current from the RES pin capacitor. If no current limit is detected during a cycle, a 8-µA discharge current sink is enabled to pull the RES pin towards ground. If a current limit is detected, the 8 µA sink current is disabled and an 18-µA current source causes the voltage at the RES pin to gradually increase. The LM25037 protects the converter with cycle-by-cycle current limiting while the voltage at RES pin increases. If the RES voltage reaches the 2-V threshold, the following restart sequence occurs (also see Figure 12): • The RES capacitor and SS capacitors are fully discharged. • The soft-start current source is reduced from 100 µA to 1 µA. • The SS capacitor voltage slowly increases. When the SS voltage reaches ≊1 V, the PWM comparator will produce the first narrow output pulse. After the first pulse occurs, the SS source current reverts to the normal 100-µA level. The SS voltage increases at its normal rate, gradually increasing the duty cycle of the output drivers. • If the overload condition persists after restart, cycle-by-cycle current limiting will begin to increase the voltage on the RES capacitor again, repeating the hiccup mode sequence. • If the overload condition no longer exists after restart, the RES pin will be held at ground by the 8-µA current sink and normal operation resumes. The overload timer function is very versatile and can be configured for the following modes of protection: 1. Cycle-by-cycle only: The hiccup mode can be completely disabled by connecting a 0-k Ω to 50-kΩ resistor from the RES pin to AGND. In this configuration, the cycle-by-cycle protection will limit the output current indefinitely and no hiccup sequences will occur. 2. Hiccup only: The timer can be configured for immediate activation of a hiccup sequence upon detection of an overload by leaving the RES pin open circuit. In this configuration, the first detection of current limit condition by the CS pin comparator will initiate a hiccup cycle with SS capacitor fully discharged and a delayed restart. 3. Delayed Hiccup: Connecting a capacitor to the RES pin provides a programmed interval of cycle-by-cycle limiting before initiating a hiccup mode restart, as previously described. The dual advantages of this configuration are that a short term overload will not cause a hiccup mode restart but during extended overload conditions, the average dissipation of the power converter will be very low. 4. Externally Controlled Hiccup: The RES pin can also be used as an input. By externally driving the pin to a level greater than the 2-V hiccup threshold, the controller will be forced into the delayed restart sequence. Copyright © 2008–2016, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM25037 LM25037-Q1 |
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