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54LS365A bảng dữ liệu(PDF) 1 Page - National Semiconductor (TI) |
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54LS365A bảng dữ liệu(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF6427 June 1989 54LS365ADM54LS365ADM74LS365A Hex TRI-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors When disabled both the output transistors are turned off presenting a high-imped- ance state to the bus line Thus the output will act neither as a significant load nor as a driver To minimize the possibility that two outputs will attempt to take a common bus to oppo- site logic levels the disable time is shorter than the enable time of the outputs Features Y Alternate MilitaryAerospace device (54LS365A) is available Contact a National Semiconductor Sales Of- ficeDistributor for specifications Connection Diagram Dual-In-Line Package TLF6427 – 1 Order Number 54LS365ADMQB 54LS365AFMQB 54LS365ALMQB DM54LS365AJ DM54LS365AW DM74LS265AM or DM74LS365AN See NS Package Number E20A J16A M16A N16E or W16A Function Table Y e A Input Output G1G2A Y H X X Hi-Z X H X Hi-Z LL H H LL L L H e High Logic Level L e Low Logic Level X e Either Low or High Logic Level Hi-Z e TRI-STATE (Outputs are disabled) TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
Số phần tương tự - 54LS365A |
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Mô tả tương tự - 54LS365A |
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