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CD4029BC bảng dữ liệu(PDF) 1 Page - National Semiconductor (TI) |
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CD4029BC bảng dữ liệu(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page TLF5960 February 1988 CD4029BMCD4029BC Presettable BinaryDecade UpDown Counter General Description The CD4029BMCD4029BC is a presettable updown counter which counts in either binary or decade mode de- pending on the voltage level applied at binarydecade input When binarydecade is at logical ‘‘1’’ the counter counts in binary otherwise it counts in decade Similarly the counter counts up when the updown input is at logical ‘‘1’’ and vice versa A logical ‘‘1’’ preset enable signal allows information at the ‘‘jam’’ inputs to preset the counter to any state asynchro- nously with the clock The counter is advanced one count at the positive-going edge of the clock if the carry in and pre- set enable inputs are at logical ‘‘0’’ Advancement is inhibit- ed when either or both of these two inputs is at logical ‘‘1’’ The carry out signal is normally at logical ‘‘1’’ state and goes to logical ‘‘0’’ state when the counter reaches its maximum count in the ‘‘up’’ mode or the minimum count in the ‘‘down’’ mode provided the carry input is at logical ‘‘0’’ state All inputs are protected against static discharge by diode clamps to both VDD and VSS Features Y Wide supply voltage range 3V to 15V Y High noise immunity 045 VDD (typ) Y Low power fan out of 2 TTL compatibility driving 74L or 1 driving 74LS Y Parallel jam inputs Y Binary or BCD decade updown counting Logic Diagram TLF5960 – 1 C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
Số phần tương tự - CD4029BC |
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Mô tả tương tự - CD4029BC |
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