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CD4014 bảng dữ liệu(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện CD4014
Giải thích chi tiết về linh kiện  8-Stage Static Shift Register
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CD4014 bảng dữ liệu(HTML) 3 Page - National Semiconductor (TI)

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DC Electrical Characteristics CD4014BC (Note 2) (Continued)
Symbol
Parameter
Conditions
b
40 C
a
25 C
a
85 C
Units
Min
Max
Min
Typ
Max
Min
Max
IOH
High Level Output
VDD e 5V VO e 46V
b
052
b
044
b
088
b
036
mA
Current (Note 3)
VDD e 10V VO e 95V
b
13
b
11
b
22
b
090
mA
VDD e 15V VO e 135V
b
36
b
30
b
8
b
24
mA
IIN
Input Current
VDD e 15V VIN e 0V
b
03
b
10b5
b
03
b
10
m
A
VDD e 15V VIN e 15V
03
10b5
03
10
m
A
AC Electrical Characteristics TA e 25 C input tr tf e 20 ns CL e 50 pF RL e 200 kX
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tPHL tPLH
Propagation Delay Time
VDD e 5V
200
320
ns
VDD e 10V
80
160
ns
VDD e 15V
60
120
ns
tTHL tTLH
Transition Time
VDD e 5V
100
200
ns
VDD e 10V
50
100
ns
VDD e 15V
40
80
ns
fCL
Maximum Clock
VDD e 5V
28
4
MHz
Input Frequency
VDD e 10V
6
12
MHz
VDD e 15V
8
16
MHz
tW
Minimum Clock
VDD e 5V
90
180
ns
Pulse Width
VDD e 10V
40
80
ns
VDD e 15V
25
50
ns
trCL tfCL
Clock Rise and
VDD e 5V
15
m
s
Fall Time (Note 4)
VDD e 10V
15
m
s
VDD e 15V
15
m
s
tS
Minimum Set-Up Time
VDD e 5V
60
120
ns
(Note 6) Serial Input
VDD e 10V
40
80
ns
tH t 200 ns
VDD e 15V
30
60
ns
Parallel Inputs
VDD e 5V
80
160
ns
tH t 200 ns
VDD e 10V
40
80
ns
VDD e 15V
30
60
ns
ParallelSerial Control
VDD e 5V
100
200
ns
tH t 200 ns
VDD e 10V
50
100
ns
VDD e 15V
40
80
ns
tH
Minimum Hold Time
VDD e 5V
0
ns
Serial In Parallel In tS t 400 ns
VDD e 10V
10
ns
ParallelSerial Control
VDD e 15V
15
ns
CI
Average Input Capacitance
Any Input
5
75
pF
(Note 5)
CPD
Power Dissipation Capacitance
110
pF
(Note 5)
AC Parameters are guaranteed by DC correlated testing
Note 1
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2
VSS e 0V unless otherwise specified
Note 3
IOL and IOH are tested one output at a time
Note 4
If more than one unit is cascaded trCL should be made less than or equal to the fixed propagation delay of the output of the driving stage for the estimated
capacitive load
Note 5
CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C74C family characteristics application note
AN-90
Note 6
Setup times are measured with reference to clock and a fixed hold time (tH) as specified
3


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