Vectron Interna onal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • h p://www.vectron.com

Page 4 of 6

Rev 1.2 Aug 2014

Z0 = 50 :

Z0 = 50 :

D+

D-

OUT+

OUT-

Drive Device

Receiver

Device

R1

R2

R3

R4

VDD

VDD = 3.3V => R1 = R3 = 133 : and

R2 = R4 = 82 :

VDD = 2.5V => R1 = R3 = 250 : and

R2 = R4 = 62.5 :

VDD

Z0 = 50 :

Z0 = 50 :

D+

D-

OUT+

OUT-

100 :

Drive Device

Receiver Device

VDD

Figure 3. LVPECL with Thevenin Typical Termina on

Figure 4. LVDS Single Termina on (Load Terminated)

Termina on Circuit Examples

Z0 = 50 :

Z0 = 50 :

D+

D-

OUT+

OUT-

50 :

VTT = VDD – 2.0 V

Drive Device

Receiver Device

50 :

VDD

D+

D-

OUT+

OUT-

Drive Device

Receiver Device

Z0 = 50 :

Z0 = 50 :

R1

50 :

50 :

R1

VTT

100 nF

100 nF

R1 = 100 to 150 :

VDD

Figure 1. LVPECL Typical Termina on

Figure 2. LVPECL AC Coupled Termina on