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GS2971 bảng dữ liệu(PDF) 6 Page - Semtech Corporation |
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GS2971 bảng dữ liệu(HTML) 6 Page - Semtech Corporation |
6 / 148 page GS2971 3Gb/s, HD, SD SDI Receiver Data Sheet 45898 - 2 September 2012 6 of 148 6. References & Relevant Standards .......................................................................................................144 7. Package & Ordering Information ........................................................................................................145 7.1 Package Dimensions ...................................................................................................................145 7.2 Packaging Data .............................................................................................................................146 7.3 Marking Diagram .........................................................................................................................146 7.4 Solder Reflow Profiles ................................................................................................................147 7.5 Ordering Information .................................................................................................................147 List of Figures Figure 3-1: Digital Input Pin with Schmitt Trigger............................................................................... 26 Figure 3-2: Bidirectional Digital Input/Output Pin..............................................................................26 Figure 3-3: Bidirectional Digital Input/Output Pin with programmable drive strength......... 27 Figure 3-4: XTAL1/XTAL2/XTAL-OUT ................................................................................................... 27 Figure 3-5: VBG .............................................................................................................................................. 27 Figure 3-6: LB_CONT .................................................................................................................................... 28 Figure 3-7: Loop Filter .................................................................................................................................. 28 Figure 3-8: SDO/SDO .................................................................................................................................... 28 Figure 3-9: Equalizer Input Equivalent Circuit .................................................................................... 28 Figure 4-1: Level A Mapping ...................................................................................................................... 30 Figure 4-2: Level B Mapping ...................................................................................................................... 31 Figure 4-3: GS2971 Integrated EQ Block Diagram ............................................................................. 32 Figure 4-4: 27MHz Clock Sources ............................................................................................................ 34 Figure 4-5: PCLK to Data and Control Signal Output Timing - SDR Mode 1 .............................. 37 Figure 4-6: PCLK to Data and Control Signal Output Timing - SDR Mode 2 .............................. 38 Figure 4-7: PCLK to Data and Control Signal Output Timing - DDR Mode ................................. 39 Figure 4-8: DDR Video Interface .............................................................................................................. 42 Figure 4-9: Delay Adjustment Ranges .................................................................................................... 43 Figure 4-10: Switch Line Locking on a Non-Standard Switch Line ............................................... 44 Figure 4-11: H:V:F Output Timing - 3G Level A and HDTV 20-bit Mode .................................... 49 Figure 4-12: H:V:F Output Timing - 3G Level A and HDTV 10-bit Mode 3G Level B 20-bit Mode, each 10-bit stream ......................................................................................... 49 Figure 4-13: H:V:F Output Timing - 3G Level B 10-bit Mode .......................................................... 50 Figure 4-14: H:V:F Output Timing - HD 20-bit Output Mode ......................................................... 50 Figure 4-15: H:V:F Output Timing - HD 10-bit Output Mode ......................................................... 50 Figure 4-16: H:V:F Output Timing - SD 20-bit Output Mode .......................................................... 50 Figure 4-17: H:V:F Output Timing - SD 10-bit Output Mode .......................................................... 50 Figure 4-18: H:V:DE Output Timing 1280 x 720p @ 59.94/60 (Format 4) ................................... 52 Figure 4-19: H:V:DE Output Timing 1920 x 1080i @ 59.94/60 (Format 5) ................................. 53 Figure 4-20: H:V:DE Output Timing 720 (1440) x 480i @ 59.94/60 (Format 6&7) .................... 54 Figure 4-21: H:V:DE Output Timing 1280 x 720p @ 50 (Format 19) ............................................. 54 Figure 4-22: H:V:DE Output Timing 1920 x 1080i @ 50 (Format 20) ........................................... 55 Figure 4-23: H:V:DE Output Timing 720 (1440) x 576 @ 50 (Format 21 & 22) ........................... 56 Figure 4-24: H:V:DE Output Timing 1920 x 1080p @ 59.94/60 (Format 16) .............................. 56 Figure 4-25: H:V:DE Output Timing 1920 x 1080p @ 50 (Format 31) .......................................... 57 Figure 4-26: H:V:DE Output Timing 1920 x 1080p @ 23.94/24 (Format 32) .............................. 57 Figure 4-27: H:V:DE Output Timing 1920 x 1080p @ 25 (Format 33) .......................................... 58 Figure 4-28: H:V:DE Output Timing 1920 x 1080p @ 29.97/30 (Format 34) .............................. 58 Figure 4-29: Y/1ANC and C/2ANC Signal Timing .............................................................................. 68 Figure 4-30: Ancillary Data Extraction - Step A .................................................................................. 75 Figure 4-31: Ancillary Data Extraction - Step B ................................................................................... 76 |
Số phần tương tự - GS2971 |
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Mô tả tương tự - GS2971 |
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