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ADS4229IRGCR bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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ADS4229IRGCR bảng dữ liệu(HTML) 7 Page - Texas Instruments |
7 / 67 page ADS4229 www.ti.com SBAS550C – JUNE 2011 – REVISED MAY 2015 Pin Functions (LVDS Mode) (continued) PIN I/O DESCRIPTION NAME NO. This pin functions as a serial interface clock input when RESET is low. It SCLK 13 I controls the low-speed mode selection when RESET is tied high; see Table 7 for detailed information. This pin has an internal 150-k Ω pull-down resistor. SDATA 14 I Serial interface data input; this pin has an internal 150-k Ω pull-down resistor. This pin functions as a serial interface register readout when the READOUT bit SDOUT 64 O is enabled. When READOUT = 0, this pin is put into a high-impedance state. This pin outputs the common-mode voltage (0.95 V) that can be used VCM 23 O externally to bias the analog input pins Pin Functions (CMOS Mode) PIN I/O DESCRIPTION NAME NO. 17 18 21 24 AGND I Analog ground 27 28 31 32 16 22 AVDD I Analog power supply 33 34 CLKM 26 I Differential clock negative input CLKOUT 57 O CMOS output clock CLKP 25 I Differential clock positive input CTRL1 35 I Digital control input pins. Together, they control various power-down modes. CTRL2 36 I Digital control input pins. Together, they control various power-down modes. CTRL3 37 I Digital control input pins. Together, they control various power-down modes. DA0 42 DA1 43 DA2 44 DA3 45 DA4 46 DA5 47 O Channel A ADC output data bits, CMOS levels DA6 50 DA7 51 DA8 52 DA9 53 DA10 54 DA11 55 Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: ADS4229 |
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