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ADS4229 bảng dữ liệu(PDF) 6 Page - Texas Instruments

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ADS4229
SBAS550C – JUNE 2011 – REVISED MAY 2015
www.ti.com
Pin Functions (LVDS Mode) (continued)
PIN
I/O
DESCRIPTION
NAME
NO.
CLKOUTM
56
O
Differential output clock, complement
DA0M
42
O
Channel A differential output data pair, D0 and D1 multiplexed
DA0P
43
DA2M
44
O
Channel A differential output data D2 and D3 multiplexed
DA2P
45
DA4M
46
O
Channel A differential output data D4 and D5 multiplexed
DA4P
47
DA6M
50
O
Channel A differential output data D6 and D7 multiplexed
DA6P
51
DA8M
52
O
Channel A differential output data D8 and D9 multiplexed
DA8P
53
DA10M
54
O
Channel A differential output data D10 and D11 multiplexed
DA10P
55
DB0M
62
O
Channel B differential output data pair, D0 and D1 multiplexed
DB0P
63
DB2M
2
O
Channel B differential output data D2 and D3 multiplexed
DB2P
3
DB4M
4
O
Channel B differential output data D4 and D5 multiplexed
DB4P
5
DB6M
6
O
Channel B differential output data D6 and D7 multiplexed
DB6P
7
DB8M
8
O
Channel B differential output data D8 and D9 multiplexed
DB8P
9
DB10M
10
O
Channel B differential output data D10 and D11 multiplexed
DB10P
11
49
DRGND
I
Output buffer ground
PAD
1
DRVDD
I
Output buffer supply
48
INP_A
29
I
Differential analog positive input, channel A
INM_A
30
I
Differential analog negative input, channel A
INP_B
19
I
Differential analog positive input, channel B
INM_B
20
I
Differential analog negative input, channel B
38
39
40
41
NC
Do not connect, must be floated
58
59
60
61
Serial interface RESET input.
When using the serial interface mode, the internal registers must be initialized
through a hardware RESET by applying a high pulse on this pin or by using the
RESET
12
I
software reset option; refer to the Serial Interface Configuration section.
In parallel interface mode, the RESET pin must be permanently tied high.
SCLK and SEN are used as parallel control pins in this mode. This pin has an
internal 150-k
Ω pull-down resistor.
6
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