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ADC128S052 bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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ADC128S052 bảng dữ liệu(HTML) 5 Page - Texas Instruments |
5 / 32 page ADC128S052, ADC128S052-Q1 www.ti.com SNAS333E – AUGUST 2005 – REVISED DECEMBER 2015 6.4 Recommended Operating Conditions See (1) MIN NOM MAX UNIT ADC128S052 −40 TA 105 °C Operating Temperature ADC128S052-Q1 −40 TA 125 °C VA Supply Voltage 2.7 5.25 V VD Supply Voltage 2.7 VA V Digital Input Voltage 0 VA V Analog Input Voltage 0 VA V Clock Frequency 50 1600 kHz (1) All voltages are measured with respect to GND = 0 V, unless otherwise specified. 6.5 Thermal Information ADC128S052, ADC128S052-Q1 THERMAL METRIC(1) PW (TSSOP) UNIT 16 PINS RθJA Junction-to-ambient thermal resistance 110 °C/W RθJC(top) Junction-to-case (top) thermal resistance 42 °C/W RθJB Junction-to-board thermal resistance 56 °C/W ψJT Junction-to-top characterization parameter 5 °C/W ψJB Junction-to-board characterization parameter 55 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.6 Electrical Characteristics The following specifications apply for AGND = DGND = 0 V, fSCLK = 3.2 MHz to 8 MHz, fSAMPLE = 200 kSPS to 500 kSPS, CL = 50 pF, unless otherwise noted. Maximum and minimum limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. (1) PARAMETER TEST CONDITIONS MIN TYP MAX(2) UNIT STATIC CONVERTER CHARACTERISTICS Resolution with No Missing 12 Bits Codes VA = VD = 3 V ±0.3 ±1 LSB Integral Non-Linearity (End INL Point Method) VA = VD = 5 V ±0.4 ±1 LSB 0.3 0.9 LSB VA = VD = 3 V −0.7 −0.2 LSB DNL Differential Non-Linearity 0.6 1.3 LSB VA = VD = 5 V −0.9 −0.4 LSB VA = VD = 3 V 0.8 ±2.3 LSB VOFF Offset Error VA = VD = 5 V 1.2 ±2.3 LSB VA = VD = 3 V ±0.05 ±1.5 LSB OEM Offset Error Match VA = VD = 5 V ±0.2 ±1.5 LSB VA = VD = 3 V 0.6 ±2.0 LSB FSE Full Scale Error VA = VD = 5 V 0.3 ±2.0 LSB VA = VD = 3 V ±0.05 ±1.5 LSB FSEM Full Scale Error Match VA = VD = 5 V ±0.2 ±1.5 LSB (1) Data sheet minimum and maximum specification limits are ensured by design, test, or statistical analysis. (2) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level). Copyright © 2005–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADC128S052 ADC128S052-Q1 |
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