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ADS41B29IRGZR bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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ADS41B29IRGZR bảng dữ liệu(HTML) 2 Page - Texas Instruments |
2 / 59 page 2 ADS41B29, ADS41B49 SBAS486F – NOVEMBER 2009 – REVISED FEBRUARY 2016 www.ti.com Product Folder Links: ADS41B29 ADS41B49 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Pin Configuration and Functions ......................... 4 6 Specifications......................................................... 7 6.1 Absolute Maximum Ratings ...................................... 7 6.2 ESD Ratings.............................................................. 7 6.3 Recommended Operating Conditions ....................... 8 6.4 Thermal Information .................................................. 8 6.5 Electrical Characteristics: General ............................ 9 6.6 Electrical Characteristics: ADS41B29, ADS41B49 . 10 6.7 Digital Characteristics ............................................. 11 6.8 Timing Requirements: LVDS and CMOS Modes.... 12 6.9 Timing Requirements: Reset .................................. 13 6.10 Timing Requirements: LVDS Timing Across Sampling Frequencies ............................................. 13 6.11 Timing Requirements: CMOS Timing Across Sampling Frequencies ............................................. 13 6.12 Timing Requirements: CMOS Timing Across Sampling Frequencies ............................................. 13 6.13 Typical Characteristics: ADS41B49 ...................... 14 6.14 Typical Characteristics: ADS41B29 ...................... 17 6.15 Typical Characteristics: General ........................... 20 6.16 Typical Characteristics: Contour ........................... 21 7 Parameter Measurement Information ................ 22 7.1 Timing Diagrams ..................................................... 22 8 Detailed Description ............................................ 25 8.1 Overview ................................................................. 25 8.2 Functional Block Diagram ....................................... 25 8.3 Feature Description................................................. 26 8.4 Device Functional Modes........................................ 36 8.5 Programming........................................................... 38 8.6 Register Maps ......................................................... 40 9 Application and Implementation ........................ 48 9.1 Application Information............................................ 48 10 Power Supply Recommendations ..................... 50 10.1 Power-Supply Sequence....................................... 50 11 Layout................................................................... 50 11.1 Layout Guidelines ................................................. 50 12 Device and Documentation Support ................. 51 12.1 Documentation Support ........................................ 51 12.2 Related Links ........................................................ 51 12.3 Community Resources.......................................... 51 12.4 Trademarks ........................................................... 51 12.5 Electrostatic Discharge Caution ............................ 51 12.6 Glossary ................................................................ 51 13 Mechanical, Packaging, and Orderable Information ........................................................... 51 4 Revision History Changes from Revision E (July 2012) to Revision F Page • Changed title and changed ADS41B49/29 to ADS41Bx9 and QFN to VQFN throughout document .................................... 1 • Added Applications section, Device Information table, front-page figure, ESD Ratings table, Feature Description section, Device Functional Modes section, Programming section, Register Maps section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1 • Deleted Ordering Information table ....................................................................................................................................... 1 • Changed Pin Functions table: changed title and format ....................................................................................................... 6 • Added Added last row to Voltage applied to input pins section in Absolute Maximum Ratings table ................................... 7 • Changed Temperature parameters in Absolute Maximum Ratings table: changed format of Temperature section and changed maximum specifications for TA and TJ ..................................................................................................................... 7 • Changed TYP column header to NOM in Recommended Operating Conditions table ......................................................... 8 • Changed Digital Outputs, TJ parameter in Recommended Operating Conditions table ........................................................ 8 • Deleted High-Performance Modes section from Recommended Operating Conditions table ............................................... 8 • Changed conditions of Electrical Characteristics: General table from temperature to ambient temperature ........................ 9 • Changed conditions of Electrical Characteristics: ADS41B29, ADS41B49 table from temperature to ambient temperature .......................................................................................................................................................................... 10 • Added footnote 1 to Electrical Characteristics: ADS41B29, ADS41B49 table ..................................................................... 10 • Changed conditions of Timing Requirements: LVDS and CMOS Modes table from temperature to ambient temperature 12 • Added footnotes 6 and 7 to Timing Requirements: LVDS and CMOS Modes table............................................................ 12 • Added footnote 1 to Timing Requirements: Reset table ..................................................................................................... 13 • Changed title of Figure 13 and Figure 14 ............................................................................................................................ 16 • Changed title of Figure 31 and Figure 32 ............................................................................................................................ 19 |
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Mô tả tương tự - ADS41B29IRGZR |
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