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ADS42B49 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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ADS42B49 bảng dữ liệu(HTML) 1 Page - Texas Instruments |
1 / 65 page REFERENCE DIGITAL and DDR SERIALIZER CONTROL INTERFACE INP_A INM_A CLKP CLKM VCM CLOCKGEN DIGITAL and DDR SERIALIZER INP_B INM_B OUTPUT CLOCK BUFFER CLKOUTP/M LVDS INTERFACE SAMPLING CIRCUIT SAMPLING CIRCUIT ADS42B49 DA0P/M DA2P/M DA4P/M DA6P/M DA8P/M DA10P/M DA12P/M DB0P/M DB2P/M DB4P/M DB6P/M DB8P/M DB10P/M DB12P/M SDOUT 14-Bit ADC 14-Bit ADC Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADS42B49 SBAS558C – DECEMBER 2012 – REVISED DECEMBER 2015 ADS42B49 Dual-Channel, 14-Bit, 250-MSPS Ultralow-Power ADC with Analog Input Buffer 1 Features 2 Applications 1 • Maximum Sample Rate: 250 MSPS • Wireless Communications Infrastructure • Ultralow Power: • Software-Defined Radio • Power Amplifier Linearization – 850-mW Total Power at 250 MSPS • Integrated Analog Input Buffer: – Input Capacitance: 2.2 pF at 170 MHz 3 Description – Input Resistance: 1.1 k Ω at 170 MHz The ADS42B49 is an ultralow-power dual-channel, • High Dynamic Performance: 14-bit analog-to-digital converter (ADC) featuring – 85-dBc SFDR at 170 MHz integrated analog input buffers. It uses innovative design techniques to achieve high dynamic – 70.7-dBFS SNR at 170 MHz performance, while consuming extremely low power. • Crosstalk: > 85 dB at 185 MHz The presence of analog input buffers makes this • Programmable Gain Up to 6 dB for device easy to drive and helps achieve high SNR and SFDR Trade-off performance over a wide frequency range. The ADS42B49 is well-suited for multi-carrier, wide • DC Offset Correction bandwidth communications applications. • Output Interface Options: – 1.8-V Parallel CMOS Interface Device Information(1) – Double Data Rate (DDR) LVDS with PART NUMBER PACKAGE BODY SIZE (NOM) Programmable Swing: ADS42B49 VQFN(64) 9.00 mm × 9.00 mm – Standard Swing: 350 mV (1) For all available packages, see the orderable addendum at the end of the data sheet. – Low Swing: 200 mV • Supports Low Input Clock Amplitude Down to 200 mVPP • Package: 9.00 mm × 9.00 mm, 64-Pin Quad Flat No-Lead (VQFN) Package Block Diagram 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
Số phần tương tự - ADS42B49 |
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Mô tả tương tự - ADS42B49 |
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