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54ACTQ273 bảng dữ liệu(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện 54ACTQ273
Giải thích chi tiết về linh kiện  Quiet Series Octal D Flip-Flop
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54ACTQ273 bảng dữ liệu(HTML) 1 Page - National Semiconductor (TI)

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54ACTQ273
Quiet Series Octal D Flip-Flop
General Description
The ACTQ273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered
Clock (CP) and Master Reset (MR) input load and reset
(clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D in-
put, one setup time before the LOW-to-HIGH clock transi-
tion, is transferred to the corresponding flip-flop’s Q output.
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The de-
vice is useful for applications where the true output only is re-
quired and the Clock and Master Reset are common to all
storage elements.
The ACTQ utilizes NSC Quiet Series technology to guaran-
tee quiet output switching and improved dynamic threshold
performance. FACT Quiet Seriesfeatures GTOoutput
control and undershoot corrector in addition to a split ground
bus for superior performance.
Features
n ICC reduced by 50%
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Improved latch-up immunity
n Buffered common clock and asynchronous master reset
n Outputs source/sink 24 mA
n Faster prop delays than the standard ’AC/’ACT273
n 4 kV minimum ESD immunity
n Standard Microcircuit Drawing (SMD)
5962-89735
Logic Symbols
Pin Names
Description
D
0–D7
Data Inputs
MR
Master Reset
CP
Clock Pulse Input
Q
0–Q7
Data Outputs
GTOis a trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Seriesis a trademark of Fairchild Semiconductor Corporation.
DS100240-1
IEEE/IEC
DS100240-2
August 1998
© 1998 National Semiconductor Corporation
DS100240
www.national.com


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