1

2

3

4

5

6

7

14

13

12

11

10

9

8

DISCHARGE

THRESHOLD

CTRL VOLTAGE

RESET

OUTPUT

TRIGGER

GND

TRIGGER

OUTPUT

RESET

CTRL VOLTAGE

THRESHOLD

VCC

DISCHARGE

LM556

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SNAS549A – MARCH 2000 – REVISED OCTOBER 2015

5 Pin Configuration and Functions

D or NFF Package

14-Pin SOIC or PDIP

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

CONTROL

Controls the threshold and trigger levels. It determines the pulse width of the output

VOLTAGE

3

I

waveform. An external voltage applied to this pin can also be used to modulate the output

(Timer 0)

waveform.

CONTROL

Controls the threshold and trigger levels. It determines the pulse width of the output

VOLTAGE

11

I

waveform. An external voltage applied to this pin can also be used to modulate the output

(Timer 1)

waveform.

DISCHARGE

Open collector output which discharges a capacitor between intervals (in phase with output).

1

I

(Timer 0)

It toggles the output from high to low when voltage reaches 2/3 of supply voltage.

DISCHARGE

Open collector output which discharges a capacitor between intervals (in phase with output).

13

I

(Timer 1)

It toggles the output from high to low when voltage reaches 2/3 of supply voltage.

GND

7

O

Ground reference voltage

OUTPUT

5

O

Output driven waveform

(Timer 0)

OUTPUT

9

O

Output driven waveform

(Timer 1)

RESET

Negative pulse applied to this pin to disable or reset the timer. When not used for reset

4

I

(Timer 0)

purposes, it should be connected to Vcc to avoid false triggering.

RESET

Negative pulse applied to this pin to disable or reset the timer. When not used for reset

10

I

(Timer 1)

purposes, it should be connected to Vcc to avoid false triggering.

THRESHOLD

2

I

(Timer 0)

amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop.

TRIGGER

Responsible for transition of the flip-flop from set to reset. The output of the timer depends

6

I

(Timer 0)

on the amplitude of the external trigger pulse applied to this pin.

THRESHOLD

12

I

(Timer 1)

amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop.

TRIGGER

Responsible for transition of the flip-flop from set to reset. The output of the timer depends

8

I

(Timer 1)

on the amplitude of the external trigger pulse applied to this pin.

VCC

14

I

Supply voltage with respect to GND

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