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SI1120-EK bảng dữ liệu(PDF) 2 Page - Silicon Laboratories |
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SI1120-EK bảng dữ liệu(HTML) 2 Page - Silicon Laboratories |
2 / 10 page Si1120-EK 2 Rev. 0.3 3.2. Hardware Setup 1. Ensure the shorting blocks are configured for basic operation on both boards, as shown in Figure 1 and Figure 2. 2. Connect the Si1120 EVB to the 96-pin connector on the C8051F930 TB. 3. Connect the USB Debug Adapter to the DEBUG connector on the C8051F930 TB with the 10-pin ribbon cable. 4. Connect one end of a USB cable to the USB connector on the USB Debug Adapter, and the other end to a USB Port on the PC. 5. Verify that a shorting block is installed on J17 of the C8051F930 TB and that SW5 is in the ON position. 6. Connect the ac/dc power adapter to power jack P1 on the C8051F930 TB (Optional). 7. Connect one end of a USB cable to connector P3 on the C8051F930 TB, and the other end to a USB port on the PC. Note that the CP210x VCP drivers should have been installed during the software setup described in “3.1. Software Download and Installation” . If the drivers are installed correctly, a dialog box will pop up notifying the user that a new USB device has been found. Refer to Figure 3 for the full hardware connection diagram. Figure 1. Si1120 Evaluation Board—Shorting Block Settings Figure 2. C8051F930 Target Board—Shorting Block and Switch Settings P1 J3 VTX0 VDD B1 J4 J9 J1 VTX0 VTX0 J2 U1 D1 D6 D7 D5 D2 D3 D4 SILICONLABS Si1120 EVB P0.2 P0.3 J3 J4 J2 ` P3 CP 2103 U3 P2 J9 USB POWER RESET P1.6 P1.5 SW4 J17 IMEASURE H2 SILICON LABS www.silabs.com H1 J6 VDD/DC+ J5 J7 J13 F930 U1 J14 J11 VBAT WALL_PWR AAA_BAT COIN_CELL TOUCH SENSE SWITCH P2.0 TOUCH SENSE SWITCH P2.1 P1.4 J15 GND J16 R15 J12 J8 +3VD +1VD VBAT J1 SW5 ON OFF SW2 SW3 PORT2 PORT1 SW1 PORT0 C8051F930-TB P1 |
Số phần tương tự - SI1120-EK |
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Mô tả tương tự - SI1120-EK |
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