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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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54ACT74 bảng dữ liệu(PDF) 1 Page - National Semiconductor (TI) |
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54ACT74 bảng dữ liệu(HTML) 1 Page - National Semiconductor (TI) |
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1 / 8 page  54AC74/54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be trans- ferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to S D (Set) sets Q to HIGH level LOW input to C D (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on C D and SD makes both Q and Q HIGH Features n I CC reduced by 50% n Output source/sink 24 mA n ’ACT74 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD) — ’AC74: 5962-88520 — ’ACT74: 5962-87525 n 54AC74 now qualified to 300Krad RHA designation, refer to the SMD for more information Logic Symbols 10026601 IEEE/IEC 10026603 10026602 Pin Names Description D 1,D2 Data Inputs CP 1,CP2 Clock Pulse Inputs C D1,CD2 Direct Clear Inputs S D1,SD2 Direct Set Inputs Q 1,Q1,Q2,Q2 Outputs FACT® is a registered trademark of Fairchild Semiconductor Corporation. July 2003 © 2003 National Semiconductor Corporation DS100266 www.national.com |
Số phần tương tự - 54ACT74 |
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Mô tả tương tự - 54ACT74 |
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