74LVC08ADR2G datasheet(5/8 Pages) ONSEMI

tên linh kiện	74LVC08ADR2G

Giải thích chi tiết về linh kiện	Low-Voltage CMOS Quad 2-Input NAND Gate

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74LVC08A

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AC ELECTRICAL CHARACTERISTICS (tR = tF = 2.5 ns)

Symbol

Parameter

Conditions

−40

5C to +855C

−40

5C to +1255C

Unit

Min

Typ1

Max

Min

Typ1

Max

tpd

Propagation Delay (Note 5)

VCC = 1.2 V

−

11.0

−

ns

VCC = 1.65 V to 1.95 V

0.5

4.2

9.0

0.5

−

10.4

ns

VCC = 2.3 V to 2.7 V

1.0

2.5

6.9

1.0

−

8.0

VCC = 2.7 V

1.5

2.5

4.8

1.5

−

5.6

VCC = 3.0 V to 3.6 V

1.0

2.3

4.1

1.0

−

4.8

tsk(0)

Output Skew Time (Note 6)

VCC = 3.0 V to 3.6 V

−

1.0

−

1.5

ns

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Typical values are measured at TA = 25

°C and VCC = 3.3 V, unless stated otherwise.

5. tpd is the same as tPLH and tPHL.

6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.

The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter

guaranteed by design.

DYNAMIC SWITCHING CHARACTERISTICS

Symbol

Characteristic

Condition

TA = +25°C

Unit

Min

Typ

Max

VOLP

Dynamic LOW Peak Voltage (Note 7)

VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V

VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V

0.8

0.6

V

VOLV

Dynamic LOW Valley Voltage (Note 7)

VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V

VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V

−0.8

−0.6

V

7. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is

measured in the LOW state.

CAPACITIVE CHARACTERISTICS

Symbol

Parameter

Condition

Typical

Unit

CIN

Input Capacitance

VCC = 3.3 V, VI = 0 V or VCC

4.0

pF

COUT

Output Capacitance

VCC = 3.3 V, VI = 0 V or VCC

5.0

pF

CPD

Power Dissipation Capacitance

(Note 8)

Per input; VI = GND or VCC

pF

VCC = 1.65 V to 1.95 V

4.4

VCC = 2.3 V to 2.7 V

7.7

VCC = 3.0 V to 3.6 V

10.5

8. CPD is used to determine the dynamic power dissipation (PD in mW).

PD = CPD x VCC2 x fi x N + S (CL x VCC2 x fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF VCC = supply voltage in Volts

N = number of outputs switching

S(CL x VCC2 x fo) = sum of the outputs.

Số phần tương tự - 74LVC08ADR2G

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
NXP Semiconductors	74LVC08AD	85Kb / 8P	Quad 2-input AND gate 1997 Jun 30
Nexperia B.V. All right...	74LVC08AD	234Kb / 12P	Quad 2-input AND gate Rev. 9 - 17 September 2021
Nexperia B.V. All right...	74LVC08AD-Q100	799Kb / 14P	Quad 2-input AND gate
NXP Semiconductors	74LVC08ADB	85Kb / 8P	Quad 2-input AND gate 1997 Jun 30

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