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UC1844AAY bảng dữ liệu(PDF) 6 Page - Microsemi Corporation |
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UC1844AAY bảng dữ liệu(HTML) 6 Page - Microsemi Corporation |
6 / 8 page C URRENT M ODE PWM C ONTROLLER UC184xA/284xA/384xA PRODUCT DA T ABOOK 1996/1997 Copyright © 1995 Rev. 1.2 12/95 6 P RODUCTION D ATA S HEET TYPICAL APPLICATION CIRCUITS FIGURE 3. — CURRENT SENSE SPIKE SUPPRESSION FIGURE 4. — MOSFET PARASITIC OSCILLATIONS 6 Q1 V CC DC BUS 5 R S R 1 UCx84xA 7 UCx84xA 3 5 6 7 R S C Q1 V CC DC BUS I PK I PK(MAX) = 1.0V R S CHANGE FIGURE 5. — EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION A resistor (R 1) in series with the MOSFET gate will reduce overshoot & ringing caused by the MOSFET input capacitance and any inductance in series with the gate drive. (Note: It is very important to have a low inductance ground path to insure correct operation of the I.C. This can be done by making the ground paths as short and as wide as possible.) The RC low pass filter will eliminate the leading edge current spike caused by parasitics of Power MOSFET. f = (R A + 2RB)C 1.44 f = R A + 2RB R B Precision duty cycle limiting as well as synchronizing several parts is possible with the above circuitry. 2 6 7 R B R A 5 1 84 3 555 TIMER 4 5 8 To other UCx84xA devices 0.01 UCx84xA |
Số phần tương tự - UC1844AAY |
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Mô tả tương tự - UC1844AAY |
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