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ML2713EH bảng dữ liệu(PDF) 7 Page - Micro Linear Corporation |
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ML2713EH bảng dữ liệu(HTML) 7 Page - Micro Linear Corporation |
7 / 18 page ML2713 7 January, 2000 PRELIMINARY DATASHEET PRELIMINARY INTRODUCTION FUNCTIONAL DESCRIPTION The ML2713 is the complete IF section of Micro Linear's 2.4GHz frequency hopping, half duplex transceiver chipset. The down conversion super-heterodyne receiver circuits contain an image reject down-convert mixer, a limiter, a discriminator, a receive data filter and a tracking A/D converter. The transmit circuits contain a 6- bit D/A converter to digitally generate the IF, an anti alias filter and an image reject up-convert mixer. When combined with the ML2712 it enables design of high performance 2.4GHz half duplex radios with a fast switching time between receive and transmit modes. This is ideal for applications such as frequency hopping radios based on the IEEE 802.11 FH standard. The ML2713 has four modes of operation; 1) Filter Align, 2) Transmit, 3) Receive, and 4) Sleep. The operating modes of the ML2713 can be programmed through a 3 pin parallel interface. The ML2713 has three filters; the 2IF, discriminator, and data. Part of each filter is off chip, made up of external components, and part is on chip. The 2IF and discriminator filters have external inductors and capacitors configured to give a bandpass characteristic. In the Filter Align mode the ML2713 will adjust an on chip capacitor array that is in parallel with the external capacitance to correct for any tolerances in the external components values, thereby centering the bandpass filters to the correct frequency. In this way any production trimming of the filters is eliminated. The data filter is made up of on chip op-amps and off chip resistors and capacitors and does not need to be aligned or trimmed. In the Filter Align mode the ML2713 will adjust an on chip capacitor array that is in parallel with the external capacitance to correct for any tolerances in the external components values, thereby centering the bandpass filters to the correct frequency. In this way any production trimming of the filters is eliminated. The data filter is made up of on chip op-amps and off chip resistors and capacitors and does not need to be aligned or trimmed. In the Filter Align mode the ML2712 provides an 8MHz signal to the 2LO port of the ML2713. The 2IF filter will remove the fundamental of this signal, and pass the third harmonic at 24Mhz to the limiter and discriminator. This 24MHz should result in a zero signal at the discriminator output. If it does not, the alignment circuit will adjust the on chip capacitor array until a zero signal is achieved. In the Transmit mode, the ML2712 drives the 2LO port at 236MHz, and the 6-bit D/A converter is driven by a digitally generated FSK modulated signal from the baseband chip. Digital generation ensures that the transmit modulation can be maximized without concern for variations over temperature and process that result from varying a VCO frequency directly. The D/A is typically driven at 32 MHz, and the fundamental component is 8MHz. The output of the D/A is connected to the 2IF filter (which is acting as an anti alias filter) where the 1st alias, which is 32MHz minus 8MHz or 24MHz, is passed. In this way the frequency of the digitally generated transmit IF is normally designed to equal the received 2IF, as will be described below. (This radio architecture allows for a fast receive-to-transmit switching speed, as no PLLs require re-tuning.) The output of the 2IF filter is connected to the transmit image reject up-convert mixer. This output mixes with the 2LO port 236MHz signal, and produces a 260MHz IF signal, which is sent to the ML2712. In addition, the transmit signal is passed through the SAW filter, which acts to select the wanted alias, remove the unwanted up conversion products, and perform part or all of the modulation filter functions. In the Receive mode, the ML2712 (in typical applications) drives a 1IF signal of 260MHz through the SAW filter and into the ML2713's 1IF port, and provides the same 236MHz signal to the 2LO input as above. The 1IF port gains up the signal to improve the noise figure, and sends the 1IF signal to the image reject down-convert mixer. The mixer produces a 260MHz minus 236MHz or 24MHz 2IF signal which is then filtered by the 2IF filter. This signal is gained up by the limiter stage, and sent to the discriminator. The discriminator will convert changes in the 2IF signal into a time varying signal which is then filtered by the data filter. Increases in the 2IF result in increasing voltage at the data filter output. The data filter in turn drives one input of the output comparator. The other input of the comparator is driven by the 6-bit D/A converter. If the output of the D/A converter is lower than the output of the data filter, the comparator output will drive high. If the output of the D/A converter is higher than the output of the data filter, the comparator output will drive low. In this way a tracking A/D whose outputs are the inputs to the D/A, and which follows the data filter output, is implemented. The offset errors of a transmitting source may be removed by a receiving ML2713 during preamble. During preamble, the Vdc capacitor can be put in the acquire mode, and the average level of the data filter output will appear across it. Once Vdc is put in the hold mode, and data begins, all levels out of the data filtered are referenced to the Vdc voltage, thereby removing any offsets in the data. In the Sleep mode, all circuits are powered off and the chip typically draws less than 1 mA. |
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