TC1784 datasheet(8/123 Pages) INFINEON

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TC1784

Summary of Features

Data Sheet

1

V 1.1.1, 2014-05

1

Summary of Features

The

SAK-TC1784F-320F180EL / SAK-TC1784F-320F180EP

has

the

following

features:

•

High-performance 32-bit super-scalar TriCore V1.3.1 CPU with 4-stage pipeline

– Superior real-time performance

– Strong bit handling

– Fully integrated DSP capabilities

– Single precision Floating Point Unit (FPU)

– 180 MHz operation at full temperature range

•

32-bit Peripheral Control Processor with single cycle instruction (PCP2)

– 16 Kbyte Parameter Memory (PRAM)

– 32 Kbyte Code Memory (CMEM)

– 180 MHz operation at full temperature range

•

Multiple on-chip memories

– 2.5 Mbyte Program Flash Memory (PFLASH) with ECC

– 64 Kbyte Data Flash Memory (DFLASH) usable for EEPROM emulation

– 128 Kbyte Data Memory (LDRAM)

– Instruction Cache: up to 16 Kbyte (ICACHE, configurable)

– 40 Kbyte Code Scratchpad Memory (SPRAM)

– Data Cache: up to 4 Kbyte (DCACHE, configurable)

– 8 Kbyte Overlay Memory (OVRAM)

– 16 Kbyte BootROM (BROM)

•

16-Channel DMA Controller

•

Sophisticated interrupt system with 2

× 255 hardware priority arbitration levels

serviced by CPU or PCP2

•

High performing on-chip bus structure

– 64-bit Local Memory Buses between CPU, Flash and Data Memory

– 32-bit System Peripheral Bus (SPB) for on-chip peripheral and functional units

– One bus bridge (LFI Bridge)

•

Versatile On-chip Peripheral Units

– Two Asynchronous/Synchronous Serial Channels (ASC) with baud rate generator,

parity, framing and overrun error detection

– Three High-Speed Synchronous Serial Channels (SSC) with programmable data

length and shift direction

– One serial Micro Second Bus interface (MSC) for serial port expansion to external

power devices

– One High-Speed Micro Link interface (MLI) for serial inter-processor

communication

– One External Bus Interface (EBU) with

32-bit demultiplexed / 16-bit multiplexed external bus interface

Scalable external bus timing up to 75 MHz

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