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SM39R04G1 bảng dữ liệu(PDF) 11 Page - SyncMOS Technologies,Inc |
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SM39R04G1 bảng dữ liệu(HTML) 11 Page - SyncMOS Technologies,Inc |
11 / 47 page SM39R04G1 8-Bit Micro-controller 4KB with ISP Flash & 256B RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. ISSFD-M053 11 Ver.H SM39R04G1 08/2013 Mnemonic: CKCON Address: 8Eh 7 6 5 4 3 2 1 0 Reset - ITS - - - - 10H ITS: Instruction timing select. ITS [6:4] Instruction timing 000 1T mode 001 2T mode (default) 010 3T mode 011 4T mode 100 5T mode 101 6T mode 110 7T mode 111 8T mode The default is in 2T mode, and it can be changed to another Instruction timing mode if CKCON [6:4] (at address 8Eh) is change any time. Not every instruction can be executed with one machine cycle. The exact machine cycle number for all the instructions are given in the next section. 1.4. RESET 1.4.1. Hardware RESET function SM39R04G1 provides on-chip hardware RESET mechanism,,the reset duration is programmable by writer or ISP。 on-chip hardware RESET duration 25ms (default) 200ms 100ms 50ms 16ms 8ms 4ms 1.4.2. Software RESET function SM39R04G1 provides one software reset mechanism to reset whole chip. To perform a software reset, the firmware must write three specific values 55h, AAh and 5Ah sequentially to the TAKEY register to enable the Software Reset register (SWRES) write attribute. After SWRES register obtain the write authority, the firmware can write FFh to the SWRES register. The hardware will decode a reset signal that “OR” with the other hardware reset. The SWRES register is self-reset at the end of the software reset procedure. Mnemonic Description Direct Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RESET Software Reset function TAKEY Time Access Key register F7h TAKEY [7:0] 00H SWRES Software Reset register E7h SWRES [7:0] 00H |
Số phần tương tự - SM39R04G1 |
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Mô tả tương tự - SM39R04G1 |
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