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MCP6001ISL bảng dữ liệu(PDF) 9 Page - Microchip Technology

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 2003 Microchip Technology Inc.
DS21733D-page 9
MCP6001/2/4
3.6.3
PEAK DETECTOR
The MCP6001/2/4 op amp has a high input impedance,
rail-to-rail input and output and low input bias current,
which makes this device suitable for a peak detector
applications. Figure 3-7 shows a peak detector circuit
with clear and sample switches. The peak-detection
cycle uses a clock (CLK), as shown in Figure 3-7.
At the rising edge of CLK, Sample Switch closes to
begin sampling. The peak voltage stored on C1 is sam-
pled to C2 for a sample time defined by tSAMP. At the
end of the sample time (falling edge of Sample Signal),
Clear Signal goes high and closes the Clear Switch.
When the Clear Switch closes, C1 discharges through
R1 for a time defined by tCLEAR. At the end of the clear
time (falling edge of Clear Signal), op amp A begins to
store the peak value of VIN on C1 for a time defined by
tDETECT.
In order to define the tSAMP and tCLEAR, it is necessary
to determine the capacitor charging and discharging
period. The capacitor charging time is limited by the
amplifier source current, while the discharging time (
τ)
is defined using R1 (
τ = R1*C1). tDETECT is the time that
the input signal is sampled on C1, and is dependent on
the input voltage change frequency.
The op amp output current limit, and the size of the
storage capacitors (both C1 and C2), could create slew-
ing limitations as the input voltage (VIN) increases. Cur-
rent through a capacitor is dependent on the size of the
capacitor and the rate of voltage change. From this
relationship, the rate of voltage change or the slew rate
can be determined. For example, with op amp short-cir-
cuit current of ISC = 25 mA and load capacitor of
C1 = 0.1 µF, then:
EQUATION
This voltage change rate is less than the MCP6001/2/4
slew rate of 600 mV/µs. When the input voltage swings
below the voltage across C1, D1 becomes reverse-
biased, which opens the feedback loop and rails the
amplifier. When the input voltage increases, the ampli-
fier recovers at its slew rate. Based on the rate of volt-
age change shown in the above equation, it takes an
extended period of time to charge a 0.1 µF capacitor.
The capacitors need to be selected so that the circuit is
not limited by the amplifier slew rate. Therefore, the
capacitors should be less than 40 µF and a stabilizing
resistor (RISO) needs to be properly selected. Refer to
Section 3.3, “Capacitive Load and Stability”, for op amp
stability.
FIGURE 3-7:
Peak Detector with Clear and Sample CMOS Analog Switches.
dVC1
dt
-------------
ISC
C1
--------
=
25mA
0.1
µF
---------------
=
dVC1
dt
-------------
250mV
µs
-----------------
=
ISC
C1
dVC1
dt
-------------
×
=
VIN
MCP6002
VC1
MCP6002
D1
A
B
VOUT
MCP6001
C
C2
Sample Signal
Clear Signal
Clear
RISO
Sample
+
+
+
CLK
tSAMP
tCLEAR
tDETECT
Switch
Switch
1/2
1/2
R1
RISO VC2
C1


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