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ADC12D1600CCMLS bảng dữ liệu(PDF) 9 Page - Texas Instruments |
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ADC12D1600CCMLS bảng dữ liệu(HTML) 9 Page - Texas Instruments |
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9 / 67 page  VA GND ADC12D1600QML www.ti.com SNAS615 – DECMEBER 2012 Table 3. Control and Status Pins (continued) Ball No. Name Equivalent Circuit Description Serial Data-Out. In ECM, serial data is shifted out of the A3 SDO device on this pin while SCS signal is asserted (logic-low). This output is tri-stated when SCS is de-asserted. Reserved. This pin is used for internal purposes and should W3 RSV NONE be connected to GND through a 100 k Ω resistor. This pin should be decoupled with a 100 nF capacitor vias a E3 RSV1 NONE low resistance, low inductance path to GND. This pin should be decoupled with a 100 nF capacitor vias a F4 RSV2 NONE low resistance, low inductance path to GND. Table 4. Power and Ground Pins Ball No. Name Equivalent Circuit Description A2, A6, B6, C7, D1, D8, D9, Power Supply for the Analog circuitry. This supply is tied to the E1, F1, H4, N4, R1, T1, U8, VA NONE ESD ring. Therefore, it must be powered up before or with any U9, W6, Y2, Y6 other supply. G1, G3, G4, H2, J3, K3, L3, VTC NONE Power Supply for the Track-and-Hold and Clock circuitry. M3, N2, P1, P3, P4, R3, R4 A11, A15, C18, D11, D15, D17, J17, J20, R17, R20, VDR NONE Power Supply for the Output Drivers. T17, U11, U15, U16, Y11, Y15 A8, B9, C8, V8, W9, Y8 VE NONE Power Supply for the Digital Encoder. Bias Voltage I-channel. This is an externally decoupled bias voltage for the I-channel. Each pin should individually be D7, J4, K2 VbiasI NONE decoupled with a 100 nF capacitor via a low resistance, low inductance path to GND. Bias Voltage Q-channel. This is an externally decoupled bias voltage for the Q-channel. Each pin should individually be L2, M4, U7 VbiasQ NONE decoupled with a 100 nF capacitor via a low resistance, low inductance path to GND. A1, A7, B2, B7, C2, C6, D4, D5, E4, K1, L1, T4, U4, U5, GND NONE Ground Return for the Analog circuitry. W2, W7, Y1, Y7, AA2:AA11 F2, G2, H3, J2, K4, L4, M2, GNDTC NONE Ground Return for the Track-and-Hold and Clock circuitry. N3, P2, R2, T2, T3, U1 A13, A17, A20, D13, D16, E17, F17, F20, M17, M20, GNDDR NONE Ground Return for the Output Drivers. U13, U17, V18, Y13, Y17, Y20 A9, B8, C9, V9, W8, Y9 GNDE NONE Ground Return for the Digital Encoder. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: ADC12D1600QML |
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