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LM723JAN-SP bảng dữ liệu(HTML) 8 Page - Texas Instruments |
8 / 21 page LM723JAN SNVS317A – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com Table 1. Resistor Values (k Ω) for Standard Output Voltage Positive Fixed Output Negative Applicable Fixed 5% Output Output Output ±5% Adjustable Output Figures Output ±5% Adjustable Applicable Figures (1) Voltage ±10% (2) Voltage ±10% R1 R2 R1 P1 R2 R1 R2 R1 P1 R2 +3.0 Figure 14, Figure 18, 4.12 3.01 1.8 0.5 1.2 +100 Figure 20 3.57 102 2.2 10 91 Figure 19, Figure 22, Figure 25 (Figure 17) +3.6 Figure 14, Figure 18, 3.57 3.65 1.5 0.5 1.5 +250 Figure 20 3.57 255 2.2 10 240 Figure 19, Figure 22, Figure 25 (Figure 17) +5.0 Figure 14, Figure 18, 2.15 4.99 0.75 0.5 2.2 −6 (3) Figure 16, 3.57 2.43 1.2 0.5 0.75 Figure 19, Figure 22, (Figure 23) Figure 25 (Figure 17) +6.0 Figure 14, Figure 18, 1.15 6.04 0.5 0.5 2.7 −9 Figure 16, 3.48 5.36 1.2 0.5 2.0 Figure 19, Figure 22, Figure 23 Figure 25 (Figure 17) +9.0 Figure 15, Figure 17, 1.87 7.15 0.75 1.0 2.7 −12 Figure 16, 3.57 8.45 1.2 0.5 3.3 (Figure 18, Figure 19, Figure 23 Figure 22, Figure 25) +12 Figure 15, Figure 17, 4.87 7.15 2.0 1.0 3.0 −15 Figure 16, 3.65 11.5 1.2 0.5 4.3 (Figure 18, Figure 19, Figure 23 Figure 22, Figure 25) +15 Figure 15, Figure 17, 7.87 7.15 3.3 1.0 3.0 −28 Figure 16, 3.57 24.3 1.2 0.5 10 (Figure 18, Figure 19, Figure 23 Figure 22, Figure 25) +28 Figure 15, Figure 17, 21.0 7.15 5.6 1.0 2.0 −45 Figure 21 3.57 41.2 2.2 10 33 (Figure 18, Figure 19, Figure 22, Figure 25) +45 Figure 20 3.57 48.7 2.2 10 39 −100 Figure 21 3.57 97.6 2.2 10 91 +75 Figure 20 3.57 78.7 2.2 10 68 −250 Figure 21 3.57 249 2.2 10 240 (1) Figures in parentheses may be used if R1/R2 divider is placed on opposite input of error amp. (2) Replace R1/R2 in figures with divider shown in Figure 26. (3) V+ and VCC must be connected to a +3V or greater supply. Table 2. Formulae for Intermediate Output Voltages Outputs from +2 to +7 volts Outputs from +4 to +250 volts Current Limiting (Figure 14, Figure 17, Figure 18, (Figure 20) Figure 19, Figure 22, Figure 25) Outputs from +7 to +37 volts Outputs from −6 to −250 volts Foldback Current Limiting (Figure 15, Figure 17, Figure 18, (Figure 16, Figure 21, Figure 23) Figure 19, Figure 22, Figure 25) 8 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated Product Folder Links: LM723JAN |
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