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SM34 bảng dữ liệu(PDF) 2 Page - Connor-Winfield Corporation

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Giải thích chi tiết về linh kiện  8 REFERENCE SURFACE MOUNT STRATUM 3 MODULE
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Trang chủ  http://www.conwin.com
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SM34 Data Sheet #:
TM095
Page 2
Rev:
05 Date: 11/19/12
© Copyright 2012 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
General Description
The SM34 timing module provides a clock output that meets or exceeds Stratum 3 specifications given in GR-1244-CORE (Issue 2),
GR-253-CORE (Issue 3) and ITU-T G.812 (option 3). The SM34 features eight reference inputs. Each input will auto-detect the following
reference frequencies: 8 kHz, 1.544 MHz, 2.048 MHz, 12.96 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz and 77.76 MHz.
The SM34 timing module can be configured during production to produce an output up to 77.76MHz. This output is derived from an
onboard VCXO and must be specified when ordering. The second output is a BITS output selectable for either 1.544 or 2.048 MHz.
The master/slave output is 8KHz. The user communicates with the SM34 module through a SPI port. The user controls the SM34
operation by writing to the appropriate registers. The user can also enable or disable SPI operation through a SPI_Enable pin.
The SM34 offers a wide range of options for the system designer. The bandwidth is SPI Port-selectable from 0.025 Hz to 1.6 Hz.
0.098 Hz is the recommended operational bandwidth for Stratum 3 applications. The 8 kHz output has an adjustable pulse width.
The pull-in range is also adjustable to establish the desired reference frequency rejection limits. A Free Run frequency calibration
value can be written to the module to provide a high degree of accuracy in the free run mode. The reference frequency for any given
reference input is automatically detected. A wealth of status information is available through the SPI Port registers. The user also has
a choice between autonomous or full manual control operation.
In manual mode, the user controls the module operating modes Free Run, Hold Over or locked to a specific reference. If the
chosen reference is unavailable or disqualified the module automatically enters Hold Over.
In autonomous control mode, operational mode selection occurs automatically based on reference priority and qualification status.
When the active reference becomes disqualified, the module will switch to another qualified reference. If none is available, it will switch
to Hold Over. In the revertive mode the module will seek to acquire the highest priority qualified reference. In the non-revertive mode
the module will not return to the previous reference even after it is re-qualified unless there are no other qualified references.
Switching between references is hitless. Likewise, the output frequency slew rate is minimized during any change of operating
mode, including entry into and return from Free Run or Hold Over to protect traffic from transient-induced bit errors.
Reference Status information and the operating mode information is accessed through status registers. The module will set the
Interrupt pin (SPI_INT) low to indicate a status change.
Free Run operation guarantees an output within 4.6ppm of nominal frequency and Hold Over operation guarantees the output
frequency will not change by more than 0.37ppm during the first 24 hours. Frequency accuracy is based on a precision oven to
provide the stabilty required for Stratum 3 compliance.
The SM34 can be programmed to startup in any mode or bandwidth. The module may even be programmed to operate in an a
fully autonomous mode with no further configuration required.
The module operates on 3.3V ± 5% with a typical power drain of less than 500 mW. The module operates over the 0° to 70° C
commercial temperature range.
PhasebuildoutcanbeenabledordisabledbymeansoftheSPIport.
Reference Input Monitor
Control
Mode
Reference
Selection
DPLL
APLL
Reference Priority,
Revertivity and Mask
Table
Bus Interface
EEPROM
DAC
OCXO
VCXO
TRST
TCK
TDO
TDI
TMS
M/S REF
Ref 1 - 8
Reset
MASTER SELECT
BIT_SEL
SPI_ENBL
SPI_Clk
SPI_In
SPI_Out
SPI_INT
8
Output 1
8K_OUT
BITS_Clk
LOS
LOL
Hold_Good
Functional Block Diagram
Figure 1


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