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ADM6320DY50ARJRL7 bảng dữ liệu(PDF) 6 Page - Analog Devices |
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ADM6320DY50ARJRL7 bảng dữ liệu(HTML) 6 Page - Analog Devices |
6 / 16 page ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Data Sheet Rev. F | Page 6 of 16 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS ADM6316/ ADM6320 TOP VIEW (Not to Scale) RESET 1 GND 2 MR 3 VCC WDI 5 4 Figure 3. ADM6316/ADM6320 Pin Configuration ADM6317 TOP VIEW (Not to Scale) RESET 1 GND 2 MR 3 VCC WDI 5 4 Figure 4. ADM6317 Pin Configuration ADM6318/ ADM6321 TOP VIEW (Not to Scale) RESET 1 GND 2 RESET 3 VCC WDI 5 4 Figure 5. ADM6318/ADM6321 Pin Configuration ADM6319/ ADM6322 TOP VIEW (Not to Scale) RESET 1 GND 2 RESET 3 VCC MR 5 4 Figure 6. ADM6319/ADM6322 Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 RESET (ADM6316/ADM6318/ADM6319/ ADM6320/ADM6321/ADM6322) Active-Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. Push-Pull Output Stage for the ADM6316/ADM6318/ADM6319. Open-Drain Output Stage for the ADM6320/ADM6321/ADM6322. RESET (ADM6317) Active-High Push-Pull Reset Output. 2 GND (all models) Ground. 3 MR (ADM6316/ADM6317/ADM6320) Manual Reset Input. This is an active-low input that when forced low for at least 1 µs, generates a reset. It features a 52 kΩ internal pull-up. RESET (ADM6318/ADM6319/ADM6321/ADM6322) Active-High Push-Pull Reset Output. 4 WDI (ADM6316/ADM6317/ADM6318/ ADM6320/ADM6321) Watchdog Input. Generates a reset if the logic level on the pin remains low or high for the duration of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Leave this pin floating to disable the watchdog timer. MR (ADM6319/ADM6322) Manual Reset Input. 5 VCC (all models) Power Supply Voltage Being Monitored. |
Số phần tương tự - ADM6320DY50ARJRL7 |
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Mô tả tương tự - ADM6320DY50ARJRL7 |
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